---
title: "TechInsights: DRAM is expected to enter the single-digit nanometer technology node by the end of 2027"
description: "TechInsights expects that by the end of 2027, DRAM will enter the single-digit nanometer technology node, with main products including D1a and D1b. In the first quarter of 2025, SK Hynix will launch t"
type: "news"
locale: "en"
url: "https://longbridge.com/en/news/228644054.md"
published_at: "2025-02-18T06:44:03.000Z"
---

# TechInsights: DRAM is expected to enter the single-digit nanometer technology node by the end of 2027

> TechInsights expects that by the end of 2027, DRAM will enter the single-digit nanometer technology node, with main products including D1a and D1b. In the first quarter of 2025, SK Hynix will launch the D1c product, which is expected to dominate the market in 2026 and 2027. In the future, the demand for memory capacity from AI and data centers will increase, necessitating the development of higher density 3D DRAM architectures

According to the Zhitong Finance APP, the latest T1-2025 DRAM video briefing has been released on the TechInsights platform. This video briefing provides detailed information on DRAM technology, roadmap updates, trends, comparisons, and outlook. D1a and D1b are the mainstream products in the market. By the end of 2027, TechInsights expects DRAM to enter the single-digit nanometer technology node, such as D0a, followed by the 0b and 0c generations.

In the first quarter of 2025, a small portion of D1c products will be launched in the market, initially by SK Hynix. The D1c generation will dominate in 2026 and 2027, including HBM4 DRAM applications. From a market perspective, HBM products, especially HBM3 and HBM3E, offer excellent performance but are currently expensive, while traditional products like LPDDR5 and DDR5 devices are relatively cheaper and have weaker performance.

In the future, AI and data centers will require higher memory capacity for individual bare chips, such as 32 Gb, 48 Gb, or 64 Gb chips, but the mainstream in the market remains 16 Gb bare chips. In higher density DRAM chips, 3D DRAM architectures should be developed, such as 4F2 vertical channel transistor (VCT) units, IGZO DRAM units, or 3D stacked DRAM units, and commercialized at nodes below 10 nanometers (single-digit nodes), especially by major manufacturers like Samsung, SK Hynix, and Micron, as candidates for the next generation of DRAM scaling

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> **Disclaimer**: This article is for reference only and does not constitute any investment advice.