Samsung Confirms HBM5 Will Adopt 2nm GAA Process, With Speed Increased by Over 50% Compared to HBM4E

Samsung Electronics has officially disclosed the core technical roadmap for its next-generation high-bandwidth memory, HBM5, confirming that the base die will incorporate a 2nm process using GAA (Gate-All-Around) architecture. The goal is to increase speed by more than 50% compared to HBM4E while significantly improving power efficiency.

The above information comes from an exclusive interview article published on July 27 by the Samsung Semiconductor Official Newsroom. The interviewee was Koo Ja-hoon, Vice President and Head of the Technology Development Office in the Foundry Business Unit of Samsung Electronics' Semiconductor Division. This marks Samsung's clearest explanation to date of HBM5 technical specifications and process roadmaps, signaling a new stage in the deep integration of memory and logic processes in the AI chip arms race. For investors closely watching whether Samsung can regain its competitive edge in the HBM market, this disclosure provides important signals regarding technological progress.

Samsung also revealed that its foundry division began mass production of the first-generation 2nm process in the second half of last year and plans to start mass production of the second-generation 2nm process, featuring further improvements in performance and yield, in the second half of this year for new mobile products. Additionally, Samsung disclosed that it has secured orders for automotive-grade 2nm products from Tesla and continues to receive additional orders from major customers in the AI/HPC and cloud service sectors.

HBM5 Base Die Locked into 2nm GAA, Targeting Over 50% Speed Increase

According to Samsung's official disclosure, the base die of HBM5 will adopt a 2nm process with GAA (Gate-All-Around) transistor structure and achieve higher-density TSV (Through-Silicon Via) interconnects. Koo Ja-hoon stated that since HBM5 is expected to require an operating speed increase of approximately 50% or more compared to HBM4E, it is essential to introduce the most advanced process on the base die that can achieve significant leaps in both speed and power efficiency.

The base die is located beneath the core die in the HBM stacking structure and serves as the high-speed data interface between external processors such as GPUs and CPUs and the HBM. Starting with the HBM4 generation, Samsung began introducing advanced foundry processes for the base die, replacing the previously used memory processes to enhance overall performance and energy efficiency. The base dies for HBM4 and HBM4E utilize Samsung Foundry's fourth-generation 4nm process, supporting high-speed operation above 14Gbps, and reducing power consumption and improving heat dissipation paths through optimized metal wiring layers.

Vertical Integration Advantage: Integrated Design, Manufacturing, and Packaging

Samsung positions its HBM products as a "Turn-key" solution—the core dies are manufactured by the memory division, the base dies are produced by the foundry division, and final packaging is completed by the TSP (Advanced Packaging) division, with the entire process conducted internally within Samsung.

Koo Ja-hoon pointed out that this vertical integration architecture allows Samsung to collaboratively optimize speed, power consumption, heat dissipation, and yield across the memory, foundry, and packaging divisions during the design phase, thereby shortening the mass production cycle and reducing costs. Citing the development of the HBM4 base die as an example, he stated that performance and yield targets were achieved simultaneously starting from the initial samples, with the entire process taking only about three months, which Samsung internally recognizes as a "best practice success case."

Diversification of Foundry Business: Extending from Mobile to AI, Automotive, and Robotics

While disclosing the HBM5 roadmap, Samsung's foundry division further elaborated on its expansion layout in non-mobile markets. Koo Ja-hoon stated that Samsung Foundry has demonstrated its process competitiveness through automotive-grade 2nm product orders from Tesla and, leveraging this opportunity, continues to secure orders from major customers in the AI/HPC and cloud service sectors.

In the AI/HPC field, Samsung provides one-stop solutions covering advanced packaging and high-bandwidth memory; in the data center sector, Samsung has entered the PO (Pluggable Optics) business and is developing CPO (Co-Packaged Optics) foundational technologies based on advanced processes and 3D packaging technology; in the automotive and robotics fields, Samsung is continuously expanding technical cooperation with customers and strengthening its competitiveness in special processes such as eMRAM, millimeter-wave, and RF.

Koo Ja-hoon stated that Samsung Foundry will leverage the experience and technical competitiveness accumulated from the 4nm HBM4 base die to pioneer the introduction of the 2nm process in HBM5, "consolidating its technological leadership."