Planned Total Investment of RMB 34.9 Billion! CXMT Officially Announces Two Major New Projects

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(Science and Technology Innovation Board Daily, September 28 (Reporter Guo Hui)) CXMT announced investments in new R&D and capacity expansion projects.

CXMT issued an announcement on the evening of September 28, stating its plan to use RMB 13 billion from excess IPO proceeds to invest in a new technology R&D project. Meanwhile, the company plans to provide RMB 5 billion from excess proceeds to its wholly-owned subsidiary, Changxin Memory Products (Hefei) Co., Ltd. (hereinafter referred to as "Changxin Products Hefei"), through capital injection and loans. Changxin Products Hefei will invest this amount in constructing the "Phase II Project of the Backend Testing Base for Memory Wafers of Changxin Memory Products (Hefei) Co., Ltd."

Specifically, the planned total investment for the technology R&D project amounts to RMB 24.1 billion, with a construction period of 30 months. The planned total investment for the Phase II backend testing base project is RMB 10.8 billion, aiming to build a testing factory that provides testing and module assembly services for DRAM memory chips.

CXMT stated that the foundation for building and maintaining core competitiveness and long-term development lies in unwaveringly promoting the iterative upgrading of products and process technologies. Facing such a complex industrial landscape and technological pathways, the company must rely on continuous R&D investment to drive generational evolution in process technology, ensuring qualitative leaps in storage density, power consumption control, and read/write performance for new products.

Therefore, the company intends to carry out technology R&D work by implementing projects funded by excess proceeds. This will help maintain the company's technological leadership while enabling faster launches of products that meet market demands, offer better performance, and possess stronger competitiveness, thereby enhancing the company's core competitiveness and risk resistance.

As an indispensable key link in DRAM production, testing faces potential issues of insufficient testing capacity at external packaging and testing firms and inadequate supporting investments for new expansions, due to the specialized nature of testing equipment, as the company's production capacity continuously increases and product varieties expand.

CXMT stated that to ensure testing capacity does not become a bottleneck restricting the company's production capacity and to safeguard supply chain security, there is an urgent need to increase investment in self-built testing capacity. Meanwhile, by self-building memory wafer backend testing and module projects, the company can more flexibly coordinate the utilization of testing capacity, reduce DRAM chip testing costs, improve operational efficiency and testing technology, which helps further perfect the IDM model and enhance the company's overall competitiveness.

It is understood that the net proceeds from CXMT's IPO on the Science and Technology Innovation Board amounted to RMB 66.3 billion. Before listing, the company planned to raise RMB 29.5 billion for projects such as the technical upgrade and transformation of mass production lines for memory wafer manufacturing, DRAM memory technology upgrades, and forward-looking technology research and development for dynamic random access memory.

CXMT has accelerated technological innovation through skip-generation R&D, achieving mass production from the first-generation process technology platform to the fifth-generation process technology platform, as well as product coverage and generational evolution from DDR4 and LPDDR4X to DDR5, LPDDR5/5X, and LPDDR6.

Currently, CXMT's core products and process technologies have reached an internationally advanced level.

Notably, CXMT announced in September this year that its fifth-generation process technology platform had officially achieved mass production. It is understood that through quadruple exposure technology, CXMT has shrunk the half-pitch of the active area in the memory array to 11.95 nanometers, approaching the process node of the world's most advanced memory mass production platforms. By revolutionizing process flows and adopting new materials, the aspect ratio of storage capacitors has reached 45:1. Additionally, by developing High-K Metal Gate (HKMG) processes adapted for DRAM technology, the height of the core functional area on the G5 platform was successfully reduced to 6,762 nanometers.

CXMT has also made breakthroughs in the R&D and introduction of LPDDR6.

In August this year, CXMT announced that its independently developed latest-generation low-power memory, LPDDR6, had achieved mass production and would be initially featured in the Xiaomi 18 Fold flagship foldable smartphone. The performance of CXMT's LPDDR6 chips has comprehensively surpassed the previous generation LPDDR5X. Through architectural innovation and data transmission optimization technologies, it fully unleashes data transmission potential, reaching a peak rate of 12,800 Mbps with a maximum chip capacity of 16 GB. This marks the first commercial deployment of LPDDR6 products globally.

After years of development, CXMT has established a comprehensive core technology system across various business segments, including DRAM product design, manufacturing processes, packaging and testing, and module design and application. It has accumulated extensive independent intellectual property rights and gained rich experience in rapid technological iteration and industrialization.

CXMT stated that previous deepened cooperation within the industry chain has enhanced supply chain security capabilities, providing sufficient assurance for the smooth implementation of the current excess proceeds projects and offering strong support for the company's continuous capacity expansion and technological process upgrades.

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