--- title: "NVIDIA Bets on In-House CPU to Accelerate Chip Design, Marking an AI Turning Point for the EDA Industry" type: "News" locale: "en" url: "https://longbridge.com/en/news/294169107.md" description: "NVIDIA announced that its engineers are using proprietary chip design software and collaborating with Cadence and Synopsys to optimize EDA platforms for the Vera CPU, achieving a 1.5x performance boost. Meanwhile, NVIDIA is integrating AI libraries such as PhysicsNeMo into the Nvidia Agent Toolkit, aiming to accelerate simulation, verification, and other stages in the chip manufacturing process through AI agents, thereby driving the EDA industry toward automation and intelligence" datetime: "2026-07-29T07:37:01.000Z" locales: - [zh-CN](https://longbridge.com/zh-CN/news/294169107.md) - [en](https://longbridge.com/en/news/294169107.md) - [zh-HK](https://longbridge.com/zh-HK/news/294169107.md) --- # NVIDIA Bets on In-House CPU to Accelerate Chip Design, Marking an AI Turning Point for the EDA Industry NVIDIA Corporation stated that its engineers are using **proprietary chip design software** to design **next-generation graphics processing units**. It is collaborating with two major suppliers of electronic design automation (EDA) software, **Cadence Systems Inc.** and **Synopsys Inc.**, both of which are currently optimizing their platforms to run on the **NVIDIA Vera central processing unit**, thereby accelerating chip design workloads. The chipmaker stated that Cadence’s formal verification platform, **Jasper**, and **Synopsys VCS** (a logic simulation tool used to verify chip designs before manufacturing), achieved a **1.5x performance improvement** when running on the Vera central processing unit. NVIDIA announced that it would integrate its **PhysicsNeMo physical AI library** and a series of **GPU math libraries** into the **Nvidia Agent Toolkit**, aiming to enhance the role of autonomous AI agents in the chip manufacturing process. At the **2026 Design Automation Conference** held today in Long Beach, California, NVIDIA stated that AI agents can now invoke accelerated solvers just like other third-party tools. ## Accelerating EDA Workloads NVIDIA is attempting to accelerate chip development by **speeding up EDA workloads** and increasing the level of automation across various stages of the design process. The chipmaker explained that **simulation, verification, and implementation** are all critical steps in the semiconductor design flow. Traditionally, these steps were performed by engineers and were quite tedious. It is not uncommon for engineers to spend **years** verifying device performance, identifying issues, and refining designs through **thousands of iterations** before finalizing the blueprint for a new generation of semiconductors. For years, NVIDIA has been working to accelerate these processes. While GPUs and AI have provided assistance in certain areas, **many aspects of EDA still heavily rely on CPU performance**. For instance, **logic simulation, formal verification, and parts of digital implementation** require fast single-core performance, efficient memory systems, and high overall throughput. These characteristics are best provided by CPU architectures, meaning they continue to play a crucial role in verifying new chip designs and exploring alternatives. By optimizing the **Vera CPU** for EDA workloads, NVIDIA stated that it has demonstrated the ability to accelerate two computationally intensive stages in the early chip design lifecycle. **Cadence Jasper** is a verification platform that uses intelligent verification techniques and machine learning algorithms to identify and fix bugs; while **Synopsys VCS** is used to simulate and verify complex chip designs before manufacturing. In NVIDIA’s early tests, the company stated it was able to boost the **performance of these two applications by 1.5x**. The chipmaker said it will collaborate with Cadence and Synopsys to optimize other EDA workflows on the Vera platform. Ultimately, they hope to accelerate the design of its subsequent product (**codenamed Rosa CPU**), which will feature the **next-generation Nvidia Rigel core**. ## Chip Design Automation NVIDIA is building a **continuous feedback loop**, where its current-generation Vera CPU accelerates the development of future generations of products. By adding **PhysicsNeMo** and **CUDA-X libraries** to the **Nvidia Agent Toolkit**, NVIDIA is also strengthening its agents' involvement in the chip design process. Creating more sophisticated chips requires engineers to integrate physics, simulation, and performance analysis within increasingly complex design cycles. With today’s update, **PhysicsNeMo and CUDA-X have become tools available for agents**. PhysicsNeMo provides agents with the physical skills needed to train and deploy AI models, while CUDA-X libraries introduce **accelerated solvers and quantum chemistry capabilities** into agent engineering workflows. Additionally, NVIDIA announced updates to the CUDA-X libraries, supporting **“iterative sparse solvers”** on its GPUs for the first time. The new libraries released today include: - **cuISS**: For iterative solvers - **cuDSS**: Direct sparse solver for circuit and device simulation - **cuEST**: Quantum chemistry simulation for predicting material behavior at the atomic scale NVIDIA stated that its partners have achieved encouraging results: - **Keysight Technologies Inc.** saw **electromagnetic simulation speeds increase by up to 10x** after using the new cuDSS library; - **Silvaco Group Inc.** completed a photonics edge coupler simulation with **3.2 billion mesh nodes** in **under 4 hours** on a cluster of 32 GPUs. The chipmaker also mentioned that **Cadence’s AuraStack AI super-agent** is now running on cuDSS on its **Millenium M2000 supercomputer**. Cadence stated that its **design verification workflow speed increased by 15x**—a particularly encouraging figure considering that verification workloads in the chip design industry consume **billions of compute hours** annually. All this software is **provided free of charge** to chip designers. **PhysicsNeMo is licensed under Apache 2.0**, while the new CUDA-X libraries are free and can directly replace the manual code that engineers typically need to write themselves. Notably, **PhysicsNeMo and CUDA-X can only run on NVIDIA’s own chips**. > **“Engineering technology has reached a turning point. AI can now work in concert with physics, simulation, and design tools. With the Nvidia Agent Toolkit, developers can build agent engineers capable of reasoning with physical principles, running simulations, and generating high-fidelity data, thus becoming a new engine for innovation in chip and system design.”** — Vice President and General Manager of Computing Engineering, NVIDIA Risk Warning and Disclaimer The market involves risks; investment should be made with caution. This article does not constitute personal investment advice, nor does it take into account the specific investment objectives, financial status, or needs of individual users. Users should consider whether any opinions, views, or conclusions in this article align with their specific circumstances. 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