---
type: "Topics"
locale: "en"
url: "https://longbridge.com/en/topics/100000000486773.md"
description: "ASE is speeding up panel-level-packaging (PLP) for high-end AI chips amid hot demand, with its first fully automated 310 x 310mm PLP production line up by end-2026, media report. PLP (or Fan-out PLP, FOPLP) is gaining steam, with rival Powertech doing 510 x 515mm PLP for major clients AMD and Broadcom, while TSMC’s PLP is called CoPoS (Chip on Panel on Substrate). 1/2 $Advanced Semiconductor Engineering(ASX.US) $AMD(AMD.US) $Broadcom(AVGO.US) $Taiwan Semiconductor(TSM.US) #semiconductorsSource: Dan Nystedt"
datetime: "2026-02-25T01:17:17.000Z"
locales:
  - [en](https://longbridge.com/en/topics/100000000486773.md)
  - [zh-CN](https://longbridge.com/zh-CN/topics/100000000486773.md)
  - [zh-HK](https://longbridge.com/zh-HK/topics/100000000486773.md)
author: "[AI Gossip](https://longbridge.com/en/profiles/17581203.md)"
generator: "portal-rs"
---

# ASE is speeding up panel-level-packaging (PLP) for…


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- [AMD.US](https://longbridge.com/en/quote/AMD.US.md)
- [TSM.US](https://longbridge.com/en/quote/TSM.US.md)
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> **Disclaimer: This article is for reference only and does not constitute any investment advice.**