On Friday, November 17th, HBM concept stocks remained active, with Huahai Chengke and Zhongfu Circuit both hitting the daily limit, Yishitong rising over 16%, and Lianrui New Materials and Saiteng Shares following suit.
In terms of news, the demand for HBM storage chips has been ignited by AI, with NVIDIA's new generation AI chip H200 equipped with HBM3e. The three major storage giants are competing to expand HBM production, with Samsung and SK Hynix planning to increase HBM output by 2.5 times.
According to a recent report by Founder Securities, the growth of AI computing power has opened up the market space for HBM. The global HBM market is expected to reach approximately $3.63 billion in 2022, and is projected to reach $12.74 billion by 2026, with a CAGR of 37%. Currently, the HBM market is divided among three major players, with SK Hynix leading in technology, and Samsung and Micron accelerating their catch-up.
Among them, TSV is the core process of HBM, and there will also be an increase in demand for plating, testing, and bonding. By 2026, the market size of plating materials in advanced packaging and high-end interconnect applications is expected to exceed $1.2 billion. At the same time, the high bandwidth characteristics of HBM drive the demand for bonding, promoting the increase in the unit price of die bonding steps and die bonding machines.
<h2>Computing power drives explosive demand for HBM, accelerating technological iteration</h2>
HBM has the advantages of high capacity, high bandwidth, low latency, and low power consumption, and its performance has been improved in multiple dimensions through multiple iterations.
According to Founder Securities:
<blockquote>
HBM (High Bandwidth Memory) is a type of graphics DDR memory that uses advanced packaging methods (such as TSV silicon through-hole technology) to vertically stack multiple DRAMs and package them together with the GPU through an intermediate layer.
</blockquote>
The advantages of HBM lie in breaking the bottleneck of memory bandwidth and power consumption. Founder Securities points out:
<blockquote>
The DRAM stacking technology based on TSV process significantly improves bandwidth, reduces power consumption and package size. According to SAMSUNG, the 3DTSV process saves 35% of the package size compared to traditional POP packaging, reduces power consumption by 50%, and brings an 8-fold increase in bandwidth compared to traditional packaging.
<img src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/ba14e29e-8614-40b4-b6aa-2c434dea9632.png?x-oss-process=image/auto-orient,1/interlace,1/resize,w_1440,h_1440/quality,q_95/format,jpg" alt="HBM" original-src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/ba14e29e-8614-40b4-b6aa-2c434dea9632.png"/>
In terms of cost, due to its complex design and packaging process, HBM has lower production capacity and higher cost. The average selling price of HBM is at least three times that of DRAM. Previously, driven by ChatGPT and limited production capacity, the price of HBM has been rising, with HBM3's price increasing fivefold compared to the highest-performance DRAM.
</blockquote>
Founder Securities points out:
<blockquote>
Although HBM is much more expensive than ordinary DRAM, it is cheaper than SRAM, which is also located near the processor. With the release of capacity brought about by the maturity of the process, its significant size and low power consumption advantages may become an important driving force for HBM to enter the high-end consumer market, especially in the mobile field.
Since the introduction of HBM products, HBM technology has developed to its fourth generation, and the fifth generation HBM3E is already on the way. With the release of GPUs equipped with HBM chips by companies like AMD and NVIDIA, HBM has become the core of the HPC arms race.
</blockquote>
According to Founder Securities, CPU paired with HBM has already made progress, providing a flexible computing solution in conjunction with DDR.
<blockquote>
CPUs handle more types of tasks and are more random, making them more sensitive to speed and latency. The characteristics of HBM are more suitable for intensive data processing operations when paired with GPUs. Considering that HBM has a large memory bandwidth but relatively small capacity, while DDR generally has a larger capacity but smaller memory bandwidth, using DDR and HBM in different scenarios can provide more flexible memory computing options.
</blockquote>
TSV as the core technology, plating, testing, and bonding requirements will increase.
Looking ahead, the HBM market is expected to grow rapidly, and the share of HBM3 will continue to increase significantly. Founder Securities predicts:
<blockquote>
By 2023, mainstream HBM demand will upgrade from HBM2E to HBM3 or even HBM3E, with the estimated proportion of HBM3 demand reaching about 39%, an increase of over 30% compared to 2022, and reaching 60% in 2024. At that time, the market share will also surpass HBM2E.
According to TrendForce, the global HBM capacity in 2022 is approximately 180 million GB, and it is expected to grow by about 60% to reach 290 million GB in 2023, with a further 30% growth in 2024. Calculated at a selling price of $20 per GB of HBM, the global HBM market size in 2022 is approximately $3.63 billion, and it is expected to reach $12.74 billion by 2026, corresponding to a CAGR of approximately 37%.
Specifically, TSV as the core technology will drive the growth of the plating market, and the market size of related plating materials is expected to further increase, which will also push up the unit price of die bonding steps and die bonding machines.
</blockquote>
<ol>
<li>TSV demand will drive the growth of the plating market.</li>
</ol>
TSV (Through-Silicon-Via), an important part of advanced packaging technology, is the core process of HBM. HBM needs to use TSV for vertical connections, and this process accounts for nearly 30% of the cost.
Furthermore, TSV via filling is crucial for performance, with copper being the mainstream filling material. The TSV processing flow includes hole formation, deposition of insulating layers, thinning, plating, CMP, etc. Among them, copper is considered the most suitable filling material due to its ultra-low resistivity and cost.
<blockquote>
In the cost structure of TSV, the proportion of through-hole filling is 25%, and the advanced packaging drives the continuous growth of electroplating market. In the TSV process, etching of through-holes accounts for the highest proportion, at 44%, followed by through-hole filling and thinning, which account for 25% and 24% respectively. TECHCET predicts that in advanced packaging and high-end interconnect applications, the global market size of electroplating materials will reach nearly $1 billion in 2022 and is expected to exceed $1.2 billion by 2026.
<img src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/5590f96a-6271-4a94-ab06-1f3e4380bfc1.png?x-oss-process=image/auto-orient,1/interlace,1/resize,w_1440,h_1440/quality,q_95/format,jpg" alt="Image" original-src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/5590f96a-6271-4a94-ab06-1f3e4380bfc1.png"/>
Currently, orders for NVIDIA H100 GPUs have been scheduled until 2024, and CoWos is a major bottleneck for HBM. The high number of solder balls and short trace lengths of HBM require advanced 2.5D packaging technology to achieve dense short connections. Although global advanced packaging manufacturers can provide solutions similar to CoWos, the silicon interposer layer still needs to be purchased externally, which further increases the demand for TSMC's CoWos from AI chip manufacturers.
2. Drive the growth of testing and die bonding equipment demand
HBM requires KGSD (Known Good Stacked Die) testing, which drives the demand for testing. The traditional DRAM testing process includes wafer-level and package-level testing. Wafer-level testing consists of aging testing, cold/hot testing, and repair. In addition, HBM requires additional pre-bonding testing to detect defects in the circuit. In addition, additional testing is required for TSV and heat dissipation issues in HBM, and the logic chip in the bottom of HBM also needs to be tested, resulting in a significant increase in testing demand compared to traditional DRAM. Moreover, due to the much higher I/O density of HBM than DRAM, the testing solution also needs to be redeveloped.
As the manufacturing nodes of storage chips continue to shrink, the package size and bump pitch also need to be reduced accordingly, and TCB/hybrid bonding technology is gaining more and more popularity. Hybrid bonding drives the increase in bonding steps and equipment unit price.
<h2>SK Hynix leads in technology, Samsung and Micron accelerate catching up</h2>
Currently, the HBM market is divided among three major players, with SK Hynix in the lead. According to TrendForce, SK Hynix accounted for 50% of the global market size of HBM in 2022. Samsung ranked second with a 40% share, and Micron accounted for 10%.
TrendForce predicts that this year, SK Hynix and Samsung's HBM market share will be approximately 46-49%, while Micron's share will decrease to 4%-6% and further compress to 3%-5% in 2024.
<img src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/1628d387-8952-4545-a5d9-6dd2f95de2b8.png?x-oss-process=image/auto-orient,1/interlace,1/resize,w_1440,h_1440/quality,q_95/format,jpg" alt="Image" original-src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/1628d387-8952-4545-a5d9-6dd2f95de2b8.png"/>
SK Hynix's technological advantage lies in its MR-MUF technology. According to Founder Securities:
</blockquote>
<blockquote>
MR-MUF is SK Hynix's high-end packaging technology, which uses a substance called liquid epoxy resin encapsulation to fill and bond between chips. Compared to NCF, MR-MUF can effectively improve thermal conductivity, process speed, and yield. In addition to MR-MUF technology, SK Hynix is actively developing various packaging technologies, including Hybrid Bonding and Fan-out RDL.
</blockquote>
Founder Securities predicts that SK Hynix has set its production target for HBM4 in 2026:
<blockquote>
In April 2023, SK Hynix achieved the world's first 12-layer silicon through-hole technology for vertically stacked chips, with a capacity of 24GB, 50% higher than the previous generation HBM3. SK Hynix plans to provide HBM3E samples by the end of this year and start mass production in 2024. The company has set its production target for HBM4 in 2026.
</blockquote>
Samsung, on the other hand, is investing trillions of Korean won in building a new packaging line and is expected to start mass production of HBM4 in 2025. Founder Securities points out:
<blockquote>
To meet the demand in the HBM market, Samsung Electronics is constructing a new HBM packaging line with a total investment of 7000-10000 billion Korean won. It is expected to mass produce HBM on the new packaging line and is currently investing in the production of 8-layer and 12-layer HBM3 products.
Samsung plans to supply HBM3 to North American customers starting from Q4 2023. The sales proportion of HBM3 in Samsung's total DRAM sales is expected to increase from 6% in 2023 to 18% in 2024. Samsung will also launch higher-performance and higher-capacity HBM3P in the second half of 2023 and introduce samples of 12-layer HBM3E in 2024Q1. Mass production of HBM4 is expected in 2025, further enhancing the performance and capacity of HBM.
</blockquote>
Founder Securities believes that Samsung's advantage lies in being both a storage manufacturer and a wafer foundry, providing both HBM solutions and multiple HBM packaging solutions. The one-stop solution is conducive to winning more orders. Samsung offers a rich range of advanced packaging turnkey solutions, including 2.5D and 3D.
Micron expects to start mass production of HBM3E in 2024, supplying NVIDIA's next-generation GPU, and is also developing multiple generations of products. Founder Securities points out:
<blockquote>
Micron aims to catch up with HBM3E in 2024 and expects to supply its HBM3E to NVIDIA's next-generation GPU starting from 2024Q3 or Q4.
In addition to the upcoming HBM3Gen2 products, Micron has announced the development of HBMNext memory, which is expected to be launched in 2026. This HBM will provide a bandwidth of 1.5TB/s–2+TB/s per stack, with capacities ranging from 36GB to 64GB.
This article is selected from the Advanced Packaging Special Topic II: HBM Demand Surge, New Opportunities for Domestic Supply Chain, by analysts Zheng Zhenxiang (Registration No.: S1220523080004) and She Lingxing (Registration No.: S1220523070005) from Fangzheng Securities.
</blockquote>

Founder Securities pointed out that TSV is the core process in the HBM industry chain, and there will also be an increase in demand for plating, testing, and bonding. The growth in AI computing power demand has opened up the market space for HBM, and it is expected that the market size will reach 12.74 billion US dollars by 2026, with a CAGR of 37%.

Understanding the HBM Industry Chain in One Article