Before yesterday, the HBM industry maintained a situation where SK Hynix was far ahead, with Samsung and Micron following closely behind. Although there was news recently that Samsung's HBM3 received certification in the United States, it still has not been able to shake SK Hynix's position in NVIDIA GPUs, and even the progress of the Korean storage giant's HBM lags behind Micron.
Yesterday during the day, a new piece of news revealed that due to the upcoming restrictions on HBM supply to China by the United States, this has triggered a rush by Chinese companies to purchase HBM, but the focus still revolves around the outdated HBM technology.
However, after the events of last night, the HBM industry seems to be on the brink of a major change.
<h2>Samsung Finally Receives Certification</h2>
As mentioned earlier, Samsung has not yet received recognition in the most advanced HBM3E field, which has somewhat been undermining the confidence of the Korean storage giant. But finally, they have also obtained this ticket to enter.
According to three sources familiar with the matter, Samsung Electronics' fifth-generation high-bandwidth memory chip - HBM3E has passed Nvidia's testing and can be used for its artificial intelligence (AI) processors. This qualification clears a major obstacle for the world's largest memory chip manufacturer, which has been striving to catch up with local competitor SK Hynix, who has excelled in supplying advanced memory chips capable of handling AI workloads.
The sources said that although Samsung and Nvidia have not yet signed a supply agreement for the approved eight-layer HBM3E chip, they are expected to do so soon, with supplies expected to start in the fourth quarter of 2024. However, the sources also revealed that Samsung's 12-layer HBM3E chip has not yet passed Nvidia's testing, and as this matter is still confidential, the sources refused to disclose their names.
Both Samsung and Nvidia declined to comment on this news.
As a type of dynamic random-access memory or DRAM standard, HBM was first introduced in 2013, with chips vertically stacked to save space and reduce power consumption. As a key component of Graphics Processing Units (GPUs) for artificial intelligence, it helps process large amounts of data generated by complex applications. According to Reuters in May, Samsung has been seeking to pass Nvidia's tests for HBM3E and the previous fourth-generation HBM3 models since last year, but has faced challenges due to heating and power consumption issues.
Sources familiar with the situation said that the company has since redesigned the HBM3E design to address these issues.
After the Reuters article in May, Samsung stated that claims that its chips did not pass Nvidia's tests due to heating and power consumption issues were untrue. Reuters reported last month that Nvidia recently certified Samsung's HBM3 chips for use in developing processors for the Chinese market
Samsung is undoubtedly a follower in the HBM industry, as their storage team has undergone several changes recently, even the company's HBM R&amp;D team has been reorganized multiple times. However, from the recent performance, they have also made some progress.
The above information goes without saying. From Samsung's latest financial report, we found that the sales of the South Korean storage giant's HBM increased by more than 50% year-on-year, with an operating profit of 6.45 trillion Korean won, far exceeding market expectations. Such performance is undoubtedly closely related to their close cooperation with the globally renowned graphics processor manufacturer NVIDIA.
<h2>SK Hynix, Embracing Customers</h2>
In the face of Samsung's strong momentum, SK Hynix cannot sit idly by. While vigorously developing HBM technology and expanding capacity in South Korea, they are also actively embracing the United States, embracing customers, and avoiding missing any opportunities. Yesterday evening, the U.S. Department of Commerce signed a $1 billion agreement with SK Hynix to build an advanced high-bandwidth memory (HBM) packaging and research and development (R&amp;D) facility, undoubtedly giving a shot in the arm to the leading HBM player.
According to reports, SK Hynix will receive an initial allocation of $450 million and a $500 million loan from the United States to build an advanced chip packaging and research facility in Indiana, enhancing the U.S.'s capacity in key parts of the artificial intelligence supply chain.
The $3.87 billion factory will package high-bandwidth memory chips for use by AI chip manufacturers such as Nvidia Corp., with the South Korean company dominating in this field. An unnamed Department of Commerce official stated that SK Hynix is expected to ship its own memory chips from Korea to its U.S. factory. The factory is expected to create approximately 1,000 jobs. In addition to the allocation and loan, SK Hynix is also expected to enjoy a 25% tax credit like other companies building factories in the U.S.
As mentioned, SK Hynix aims to expand its leading advantage over Samsung Electronics and Micron Technology in supplying HBM chips to Nvidia, an advantage that has helped double its market value since the end of 2022. Meanwhile, packaging, the process of placing chips into casings and preparing them to be connected to devices, has become a key area of contention in U.S.-China tech conflicts.
U.S. Commerce Secretary Gina Raimondo stated, &#34;Today's historic agreement with SK Hynix will further strengthen America's AI hardware supply chain, unmatched by any other country in the world, with all major advanced semiconductor manufacturing and packaging players building or expanding in our country.&#34;
Arati Prabhakar, U.S. President's Assistant for Technology and Director of the White House Office of Science and Technology Policy, said, &#34;Advanced packaging is becoming increasingly important for AI and other cutting-edge systems, but it requires extremely precise manufacturing processes. With the incentives of the CHIPS Act, SK Hynix will make significant contributions to the complex computing systems our nation relies on
At the same time, we are also investing in research and development to win the future.&#34;
Kwak Noh-Jung, CEO of SK Hynix, said, &#34;We are very grateful for the support of the U.S. Department of Commerce and are pleased to collaborate with them to fully realize this transformation project. We are advancing the construction of the Indiana production base, collaborating with Indiana, Purdue University, and our U.S. business partners to ultimately supply cutting-edge artificial intelligence memory products from West Lafayette. We look forward to establishing a new artificial intelligence technology center, creating technical jobs in Indiana, and helping to build a stronger and more resilient supply chain for the global semiconductor industry.&#34;
For the first time, SK Hynix will collaborate with Purdue University to develop an HBM research and development project plan, including collaboration with Purdue University's Birck Nanotechnology Center and other research institutions and industry partners for advanced packaging and heterogeneous integration.
<h2>Hybrid Bonding, the Battleground</h2>
While the two giants are vigorously advancing in terms of products and customers, they are also intensifying their technological layout, with Hybrid Bonding being a new technology that both companies are optimistic about and a battleground for them.
In a recent paper, Samsung stated that it believes that manufacturing 16-stack High Bandwidth Memory (HBM) requires hybrid bonding.
Samsung stated in the paper that the lower height is the main reason for adopting hybrid bonding. In order to package 17 chips (one base chip and 16 core chips or stacks) in a size of 775 microns, the gaps between the chips must be reduced. In addition to applying hybrid bonding, other methods to solve this problem include making the core chips as thin as possible or reducing the bump spacing.
However, the two methods other than hybrid bonding are considered to have reached their limits. An insider stated that it is very difficult to control the thickness of the core chips to below 30 microns. Samsung also pointed out in its paper that there are limitations to using bump connections between chips due to the volume of the bumps. The tech giant also noted that the bump shorting issue makes reducing the spacing difficult.
Samsung also shared its plan on how to use hybrid bonding to manufacture HBM. Logic wafers undergo chemical mechanical polishing (CMP) and plasma processes. Then, the wafers are rinsed with deionized water. The chips are then stacked. After CMP, the core chips undergo chip separation processes. Subsequent processes are the same as logic wafers. Plasma processes and rinsing are performed to activate the surface. This forms a hydroxide on the surface, bonding the particles together. Copper is also bonded after an annealing process.
Lee Gyu-jei, Vice President of SK Hynix's PKG Product Development, recently stated in an internal interview, &#34;Recently, new generation packaging technologies such as hybrid bonding have received widespread attention. This technology can enhance product performance and capacity by increasing the number of chip stacks without changing the product thickness. Although there are still heat dissipation issues due to the narrowing gap between the top and bottom chips, this technology is expected to become a solution that can meet the increasingly diverse performance requirements of customers. SK Hynix plans to continue to improve the heat dissipation performance of the current advanced MR-MUF technology and ensure the development of new technologies.&#34;
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He said that in 2013, SK Hynix successfully applied TSV technology to its first-generation HBM products worldwide. TSV is a key technology that achieves the ultra-high-speed performance of HBM by vertically interconnecting thousands of micro-holes on multiple DRAMs to the electrodes.
&#34;At first, SK Hynix was also one of the hesitant companies. But we believe that in order to cope with the future market, it is necessary to master both TSV technology that can achieve high performance and high capacity, as well as wafer-level packaging (WLP) technology including stacking. Therefore, we started actively investing in research and development in the early 21st century,&#34; said Lee Gyu-jei. He further pointed out that with the introduction of HBM2E using MR-MUF technology, SK Hynix began to change the market landscape of HBM, and MR-MUF technology has become the core of SK Hynix's &#34;HBM success story&#34;.
He revealed that in the development process of 12-layer HBM3, as the number of chip stack layers increased, SK Hynix urgently needed to improve the heat dissipation performance. For the 12-layer HBM3, the traditional MR-MUF technology was unable to solve the bending problem of thinner chips.
To overcome these limitations, they upgraded the MR-MUF technology and developed advanced MR-MUF technology. With this technology, the company successfully developed and mass-produced the world's first 12-layer HBM3 last year. In March of this year, SK Hynix also mass-produced the highest performance HBM3E in the world. In addition, starting from the second half of this year, the leading HBM will provide 12-layer HBM3E using this technology to major AI technology companies. As its application field continues to expand, this technology will further support SK Hynix's leading position in the HBM market.
&#34;Not long ago, there were unfounded rumors in the industry that MR-MUF technology was unable to achieve high-layer stacking. In response, we actively communicated with customers to clarify that MR-MUF technology is the best solution for high-difficulty multilayer stacking. This effort has once again won the trust and recognition of our customers,&#34; said Lee Gyu-jei.
It is worth mentioning that at the Global Semiconductor Conference IEDM 2023 held in the United States at the end of last year, SK Hynix announced that the reliability of the hybrid bonding process used in HBM manufacturing has been ensured. SK Hynix reported that its third-generation HBM (HBM2E) uses 8-layer stacked DRAMs, and after manufacturing using the hybrid bonding process, it passed all reliability tests in various areas. In this test, SK Hynix evaluated the service life of HBM at high temperatures and checked potential issues that customers may encounter during the chip bonding process, involving four categories.
According to TheElec, semiconductor packaging company Genesem has provided its next-generation hybrid bonding equipment to chip manufacturer SK Hynix for the production of high-bandwidth memory (HBM).&#34;
According to sources, Genesem has provided two devices installed in SK Hynix's pilot factory to test hybrid bonding processes.
The memory manufacturer plans to apply hybrid bonding in its HBM production by 2026.
<h2>Customization, Next Steps</h2>
As Lee Gyu-jei mentioned, to maintain SK Hynix's leading position in the HBM market, continuous research and development of various next-generation packaging technologies are necessary to meet the growing demand for custom products in the market.
To achieve this, in April of this year, the world's largest HBM supplier, SK Hynix, partnered with global foundry TSMC to launch HBM4. It is reported that the two companies will first focus on improving the performance of the base die at the bottom of the HBM package.
Readers familiar with SK Hynix should know that the company's previous HBM products, including HBM3E (the fifth-generation HBM product), were based on the company's own process technology for manufacturing the base die. However, starting with the HBM4 product, the plan is to adopt TSMC's advanced logic process. By using advanced process technology on the base die, more functions can be added. As a result, the company plans to produce customized HBM products that meet customer demands in terms of performance and efficiency.
At the same time, both parties will work together to optimize the integration of SK Hynix's HBM products with TSMC's CoWoS technology to meet the requirements of HBM-related customers.
Samsung Electronics, which has leading technologies such as wafer foundry, is also planning to mass-produce the next generation of HBM using its cutting-edge 4-nanometer process. Sources indicate that Samsung will use the 4nm process to produce the logic chip of the sixth-generation HBM4 chip. The logic chip is located at the bottom of the chip stack and is a core component that controls the HBM chip for DRAM.
Samsung executives stated, &#34;Unlike TSMC and SK Hynix, involving chip designers in the production of HBM4 is our unique advantage.&#34; Insiders revealed that this technology group has deployed employees from the System LSI division to the newly established HBM development team.
Behind these actions is the fact that customized HBM will become a new solution to address the oversupply issue in the memory semiconductor market.
SK Hynix CEO Guo Luzheng has also emphasized, &#34;With the continuous advancement of HBM4, the demand for customization will continue to increase, becoming a global trend, shifting towards contractualization, and the risk of oversupply will gradually decrease.&#34; He added, &#34;We will develop technology that meets customer needs.&#34;
With the emergence of artificial intelligence (AI), the HBM market is evolving from a general market to a &#34;customer customization&#34; market. Samsung Electronics and SK Hynix are both committed to attracting customers in this new era of customized HBM. Samsung's statements at the &#34;Foundry Forum&#34; and its continuous development of HBM3E and HBM4 products reflect its commitment to this trend
At the same time, the cooperation between SK Hynix and TSMC and their advanced packaging technology plan highlight their strategic policy of meeting specific customer needs.
With the continuous growth of the customized HBM market, competition between Samsung and SK Hynix is expected to intensify. Both companies are leveraging their respective strengths and partnerships to maintain a leading position in this rapidly developing industry. The shift towards customization not only solves the problem of oversupply but also ensures that production is aligned with the specific needs of customers, thereby ensuring a more stable and sustainable high-bandwidth memory market.
Coupled with the uncertainties surrounding Micron, the HBM market still holds promise.
Author: Semiconductor Industry Watch, Source: Semiconductor Industry Watch, Original Title: &#34;HBM, A Night of Change&#34;

SSNGY

As the United States is about to restrict the supply of HBM to China, Chinese companies have started to rush to purchase HBM products. Despite Samsung's HBM3 receiving certification in the United States, it has not yet shaken SK Hynix's position in NVIDIA GPUs. However, Samsung has finally gained Nvidia's recognition for its HBM3E, which is a major breakthrough. Although Samsung and Nvidia have not yet signed a supply agreement for HBM3E chips, it is expected to start in the fourth quarter of 2024. Samsung's 12-layer HBM3E chips have not yet passed Nvidia's testing. HBM, as a DRAM standard, features space-saving and power-saving characteristics

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