RISC-V, Accelerating Adoption

At the 2025 China RISC-V Ecosystem Conference, Bao Yungang, Deputy Director of the Institute of Computing Technology at the Chinese Academy of Sciences, Chief Scientist at the Beijing Open Source Chip Research Institute, and Secretary-General of the China Open Instruction Ecosystem (RISC-V) Alliance, stated that the AI and automotive sectors will become emerging application scenarios for RISC-V. From the perspective of the automotive market, there is a need for high-performance SoC chips in areas such as intelligent driving and smart cockpits, but there are very few RISC-V chips involved in this area. Meanwhile, in the ubiquitous MCUs in vehicles, Arm architecture dominates, with RISC-V rarely seen. However, it is certain that RISC-V will enter the automotive space, and this is a major trend. Recently, there have been some new developments regarding RISC-V, especially in the automotive market. 01 RISC-V, gradually entering the automotive space The process of RISC-V entering the automotive sector began to accelerate in the second half of 2024. In September 2024, Great Wall Motor successfully activated the vehicle-grade MCU chip Zijing M100 based on the RISC-V architecture. This chip has been under development by Great Wall Motor since 2023. Its product features are significant, including high performance, modular design, reconfigurable cores, and a 4-stage pipeline design, demonstrating excellent performance in processing speed, time optimization, and future upgrade expansion. Enhanced ESD meets the increased requirements for static electricity in winter and off-road scenarios, improving performance by 38%. This year, the first batch of vehicles equipped with the M100 chip will enter mass production in the third quarter, with an expected installation of 2.5 million vehicles within five years. Meanwhile, Zijing Semiconductor is initiating the self-research work for domain controller chips with ASIL-D safety level. Also in 2024, in November, Dongfeng Motor released a high-performance vehicle-grade MCU chip—DF30. This vehicle-grade MCU is based on the RISC-V architecture and uses the NA900 series processor IP from Chipone. It adopts a multi-core architecture with a maximum frequency of 350MHz; developed using domestic 40nm automotive-grade technology, it features a fully domestic closed-loop process, achieving ASIL-D functional safety level. It is worth mentioning that Chipone's NA900 vehicle-grade processor is the world's first RISC-V CPU IP to pass ISO26262 ASIL-D product certification. Guoxin Technology revealed in its latest investor event that the design and development of the first high-performance vehicle-grade MCU chip CCFC3009PT based on the RISC-V architecture has been initiated in 2025. By March of this year, there began to be more discussions in the industry about RISC-V entering the automotive space. On March 17, a low-key "Automotive and RISC-V Chip Technology Integration Seminar" was held in Hefei. The central topic was singular: What will RISC-V bring to Anhui's automotive industry? Representatives from Chery Automobile, JAC Motors, and nearly 20 chip companies from across the province, along with well-known investment institutions, participated in the discussion. This meeting once again indicated that the industry's expectations for RISC-V entering the automotive space are higher than people might imagine Driving the adoption of RISC-V is not just domestic companies; many international giants have also begun to take action, and Infineon is one of them. In March, Infineon announced the launch of a new automotive microcontroller based on RISC-V in the coming years, leading the application of RISC-V in the automotive industry. Specifically, this new series will be incorporated into Infineon's automotive MCU brand AURIX, expanding the company's current automotive MCU product portfolio based on TriCore (AURIX TC series) and Arm (TRAVEO series, PSOC series). The new AURIX series will cover a wide range of automotive applications from entry-level MCUs to high-performance MCUs, surpassing the existing products in the current market. It is worth noting that last October, in a paper titled "RISC-V Needs a Safety Wheel: A Perspective from MCU Initiators" published in collaboration with Minio University, Infineon also stated that RISC-V is still relatively young and needs improvement regarding high safety requirements for automotive MCUs. Infineon's decision to develop RISC-V architecture MCUs actually marks the addition of another strong player to the RISC-V camp. 02 RISC-V Advantages in Automotive As one of the three major architectures globally, RISC-V, despite being an emerging chip computing architecture, has well-known advantages: open-source instruction set, flexible computing power expansion, free business model, and minimal geopolitical impact. How these factors will influence the adoption of RISC-V can be illustrated by two specific examples. The first is the low-profile RISC-V seminar held in Hefei mentioned earlier. Why was such a meeting held in Anhui? Because Anhui's new energy vehicle production has already surpassed one million units, ranking first in the country, and Anhui's automobile export volume has also exceeded that of Shanghai, becoming the top province for automobile exports. After reaching the top in automobile manufacturing, Anhui naturally needs to transition its identity, and the next step is the "heart and soul" of automobiles, which are chips and AI. To break the domestic chip dilemma in the automotive sector, Anhui has chosen RISC-V. The second example is Great Wall Motor, which announced this year that it will mass-produce the vehicle-grade MCU chip Zijing M100 based on RISC-V architecture. Readers familiar with Great Wall Motor should know that the company has been quite proactive in introducing domestic chips. In fact, in 2023, Great Wall Motor's domestic chip rate has already reached 17%. However, Great Wall Motor still faces severe challenges: most domestic chips lack uniformity in toolchains and software ecosystems, leading to high replacement costs, and there are also many quality issues with the chips. In reality, this is not just a situation faced by Great Wall Motor; it is a challenge that every automotive manufacturer will encounter when choosing domestic chips. After multiple discussions with industry experts, Great Wall Motor believes that RISC-V can achieve chip architecture unification and solve this problem. In these two examples, the advantages of RISC-V being selected are very clear: First, the demand for autonomous and controllable automotive chips is urgent. The open-source nature of RISC-V provides more security for the automotive industry chain. After all, the current automotive chip field's computing and control chips are highly dependent on Arm, with over 80% of the global smart cockpit and intelligent driving chip field based on Arm architecture. One of the reasons Ren Linjie, director of the Anhui Automotive Innovation Center, chose RISC-V is: "RISC-V has the advantage of being open-source, lowering the usage threshold, and supporting chip localization." RISC-V's initial statement: "Instruction sets want to be free!" has indeed become its significant advantage. Second, the electrification and intelligence of vehicles provide greater flexibility for RISC-V customization. In the development process of electric smart vehicles, the automotive architecture shows a highly fragmented characteristic, with multiple instruction architecture levels. The advantage of RISC-V is that regardless of the type of performance processor used, from MCU to CPU to AI processor, its programming methods and toolchains remain consistent. This means that developers familiar with MCUs can easily engage in CPU-related software development work, greatly enhancing software reusability. For automotive manufacturers, if their entire vehicle architecture fully adopts RISC-V technology, it will achieve a high level of transparency in the industry chain, bringing significant convenience for product design, upgrades, and more. Third, from a technical perspective, RISC-V has low power consumption and high energy efficiency. Under the same process and similar frequencies, RISC-V cores outperform ARM cores in key indicators such as performance, die size (cost), and power consumption. The University of California, Berkeley, compared two RISC-V cores with equivalent ARM cores, and under the same process and frequency, the PPA metrics of RISC-V were relatively better, with the first P in PPA referring to performance, showing a significant performance improvement. From the practical experience of RISC-V chips, the RISC-V architecture's Zijing chip M100 achieved a measured score of 2.42 Coremark/MHz, which is a 38% performance improvement compared to competitors; the die size is smaller, with the measured cost area of Zijing M100 being 20% lower than that of competitors. ** In addition, from the perspective of industrial development, the deep integration of automobiles and AI is imperative, as the market in the AI era has a stronger demand for diversified applications. The customizable advantages of RISC-V can well meet the applications in AI acceleration, edge computing, and smart terminals. These advantages have led many industry insiders to reach a consensus: although automotive chips are still dominated by the Arm architecture, the RISC-V architecture has the potential to reshape the competitive landscape. 03 Implementing Automotive Standards, RISC-V Challenges Remain The attractiveness of RISC-V is continuously increasing, but getting RISC-V into vehicles is not an easy task. In China, there are only a few dozen automotive chip products based on RISC-V, primarily positioned for mid-to-low computing power application scenarios. Companies such as Etron Technology, Guoxin Technology, Chipone Technology, Xianji Semiconductor, Dongfeng Motor, Great Wall Motor have successively launched a series of MCU products, achieving partial mass production applications in the fields of body control (seats, wipers, doors, lights, etc.), onboard chargers. From the perspective of IP providers, the number of available RISC-V IP options in both domestic and international markets is limited, and the supporting peripheral IP is not well-developed, leading to certain difficulties in the design of automotive chips based on RISC-V. Challenge One: Difficulty in Automotive Grade Certification. "Any onboard operating system or automotive toolchain, as well as automotive software, must undergo safety certification to match with the chips, which is a limitation for the automotive ecosystem," an industry insider told reporters. Achieving functional safety certification is a long "tug-of-war"; for example, Chipone Technology's NA900 took nearly two years to pass ISO 26262 ASIL-D product certification. From the overall chip design process, the design cycle for automotive-grade chips is at least 1.5 times longer than that for consumer-grade products, generally requiring two to three years to complete the design. Time cost is the most concerning issue for RISC-V related companies in promoting the implementation of automotive-grade products. Challenge Two: Incomplete Automotive Ecosystem. Another challenge for RISC-V in automotive applications lies in the software ecosystem, or more bluntly, the lack of a true software ecosystem. In terms of software availability and development, RISC-V is still catching up with companies like Arm and x86. The software ecosystem of RISC-V needs improvement in several key areas to fully realize its potential. For RISC-V chips to truly enter automotive application scenarios, collaborative work between software and hardware must be achieved. How to create a software stack that covers everything from modeling and simulation to code auto-generation, integrated compilation and debugging environments, and production line programming is a continuous focus for companies. At the same time, to achieve differentiated competition, software vendors will propose more customized requirements, which also increases the difficulty of hardware-software collaboration. 04 Conclusion RISC-V has already pressed the accelerator in the automotive field. The general view in the industry is that RISC-V is an open reduced instruction set architecture that possesses openness and scalability, making it suitable for the demands of intelligent vehicles. Although the application of RISC-V in the automotive sector is still in its early stages, it is expected to achieve large-scale implementation within the next 5 to 10 years. As the core of the industry, automotive companies must take proactive measures. On one hand, they should collaborate with chip suppliers and software developers for innovative cooperation, optimizing the supply chain system to ensure the efficient and stable supply of RISC-V chips and related software. On the other hand, based on their brand positioning and target user needs, they should leverage the RISC-V architecture to create unique selling points for automotive intelligence. China has made early and rapid progress in the RISC-V field, with Chinese companies occupying an important position in the RISC-V International Foundation, ranking in the first tier in terms of membership numbers, standard formulation, and application. Seizing the opportunities presented by RISC-V can bring more possibilities for independent innovation in China's semiconductor industry. Author of this article: Jiu Lin, Source: Semiconductor Insight, Original title: "RISC-V, Accelerating into the Automotive Sector" Risk Warning and Disclaimer The market has risks, and investment requires caution. This article does not constitute personal investment advice and does not take into account the specific investment goals, financial conditions, or needs of individual users. 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