Author: Zhou Yuan / Wall Street News
Intel has recently experienced another round of high-level personnel changes.
Public information shows that three senior executives in Intel's foundry business—Kaizad Mistry, Vice President of the Technology Development Group (TDG), Ryan Russell, and Gary Patton, Vice President of the Design Technology Platform Group—are set to leave the company.
With new CEO Chen Liwu pushing for a comprehensive strategic transformation at Intel, this personnel change undoubtedly adds more uncertainty to Intel's development path.
Kaizad Mistry has been with Intel for over 20 years (joined in 2001) and graduated from the Massachusetts Institute of Technology with a degree in Electrical Engineering. After joining Intel, Mistry progressed from a grassroots engineer to Vice President of Intel's Logic Technology Development Group and currently serves as Vice President of the Technology Development Group, participating in the research and development of Intel's process technology from 22nm to 7nm.
In terms of actual work performance, the 10nm process led by Mistry was about 24 months behind TSMC's equivalent process in mass production, which caused Intel to lag behind TSMC in advanced manufacturing.
At that time, TSMC's 10nm process was already stably supplying major clients like Apple, while Intel's 10nm chips had not yet been launched on a large scale, affecting its product competitiveness and putting its foundry business at a disadvantage in securing external orders; the mass production schedule for the 7nm process was also adjusted multiple times, impacting Intel's overall technological competitiveness.
Although process technology is a systematic project and not all responsibility can be attributed to an individual, Mistry, as the department leader, still bears responsibility.
Ryan Russell holds a Ph.D. from Stanford University and is reportedly at retirement age. Russell is also a core executive in Intel's Technology Development Group, specializing in combining cutting-edge technology with market demand to formulate practical technology strategies.
However, the advanced packaging technology promoted by Russell, while achieving some progress on a technical level, such as improvements in connection density and data transmission speed with hybrid bonding technology, has not fundamentally changed Intel's foundry business from a market performance perspective.
Gary Patton holds a Bachelor's degree in Electrical Engineering from the University of California, Los Angeles (UCLA), as well as a Master's and Ph.D. in Electrical Engineering from Stanford University, with over 30 years of experience in the semiconductor industry. He has served as Vice President and CTO of semiconductor research and development centers at IBM and GlobalFoundries, is a Fellow of the IEEE (Institute of Electrical and Electronics Engineers), and is recognized as a senior expert in the industry.
Since joining Intel in 2018, Patton's responsibilities have included providing complete design platform solutions for foundry customers, covering process design kit (PDK) development, EDA tool support verification, IP function library establishment, and design specification formulation
The core of all this is actually customer expansion and maintenance.
Due to Intel's advanced process technology lagging behind, Patton's customer expansion achievements are not significant: the main clients of Intel's foundry business are concentrated in the traditional PC and server chip sectors, while it has failed to make breakthrough progress in rapidly growing markets such as AI chips and high-end mobile chips in recent years.
Apart from the insufficient technological competitiveness, there are also significant issues with the responsiveness and flexibility of Intel's customer service system.
Chen Liwu admitted that Intel's organizational structure is bloated, leading to low efficiency in responding to customer needs and slow reaction times; as a bridge for customer communication and a promoter of cooperation for Intel's IF business, Patton's work results are limited in the face of objective technological gaps and market competition disadvantages, which is an undeniable fact.
Therefore, the departure of these three individuals can actually be seen as Chen Liwu's latest move to reform Intel's organizational structure.
According to public information, Intel is also reassessing the rationality of the organizational structure of the technology development department responsible for formulating manufacturing processes; there are plans to downsize the capacity planning team and cut some engineering team personnel.
Moreover, Intel's Executive Vice President of Technology Development, Ann Kelleher, is also set to retire within the year.
Old employees cry, new employees smile, so who are the newcomers?
Naga Chandrasekaran (of Indian descent) is a key figure entrusted with important responsibilities in this personnel adjustment, with his authority expanded to include technology development and manufacturing operations, meaning he will largely lead the subsequent development of Intel's wafer foundry business.
He was recruited to Intel during the tenure of former CEO Pat Gelsinger, serving as Intel's Chief Operating Officer; after this round of personnel adjustments, Chen Liwu has expanded his authority to include technology development and manufacturing operations, integrating technology research and commercialization, with the task of improving yield rates, shortening process introduction timelines, and enhancing process consistency.
Another senior executive at Intel, Navid Shahriari, has also been reused in this adjustment.
Shahriari has been promoted to Executive Vice President at Intel, leading the Package and Test Solutions Group (PTSG), focusing on backend chip production, responsible for assembly testing technology development, chip manufacturing/manufacturing operations, assembly testing manufacturing, and C4 wafer sorting, dedicated to developing new multi-chip integration technologies and rapidly transitioning them from the lab to mass production.
PTSG is a new department and is the core organization for Intel in the backend of chip manufacturing, integrating key businesses such as packaging testing technology development, manufacturing operations, and multi-chip integration, aiming to strengthen Intel's competitiveness in advanced packaging (such as 3D stacking and Chiplet) and testing fields, promoting the rapid transition from technology research and development to mass production.
Previously, Shahriari had been identified by Chen Liwu as Ann Kelleher's successor.
Against the backdrop of increasingly fierce competition in the global semiconductor industry, Chen Liwu's &#34;engineering&#34; to transform Intel's structure is still ongoing; will the market continue to give Chen Liwu more time?
This is a question.
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INTC

Intel recently experienced a senior management shake-up, with three key executives Kaizad Mistry, Ryan Russell, and Gary Patton set to leave. The new CEO Chen Liwu is driving a strategic transformation, and this change adds uncertainty to the company's future development. Mistry has worked at Intel for over 20 years and has participated in the research and development of several process technologies, but the mass production of 10nm and 7nm processes has lagged behind competitor TSMC. Russell focused on technology strategy, but the advanced packaging technology he promoted failed to significantly improve the company's business performance

- Intel is experiencing significant executive changes, with three key leaders in its foundry business set to depart amid a strategic transformation led by new CEO Chen Lifeng.  
- The departures of Kaizad Mistry, Ryan Russell, and Gary Patton highlight challenges in Intel's advanced process technologies and customer service responsiveness, impacting its competitive position.  
- Naga Chandrasekaran and Navid Shahriari are being positioned to lead future developments in technology and manufacturing, as Intel continues to restructure amidst increasing competition in the semiconductor industry.

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