JP Morgan once again raised its shipment forecast for Google's TPU chips, expecting shipments to reach 3.7 million units and 5 million units in 2026 and 2027, respectively, mainly benefiting from the continuous expansion of TSMC's CoWoS packaging capacity and strong market demand.
According to the Wind Trading Platform, the bank's analyst team led by Gokul Hariharan released the latest research report, raising the CoWoS capacity forecasts for 2026 and 2027 by 8% and 13%, respectively, to reflect TSMC's new capacity construction in the second half of 2026 and 2027. TSMC's CoWoS capacity is expected to reach 115,000 wafers per month by the end of 2026, with external suppliers (mainly ASE and Amkor) providing an additional capacity of 12,000 to 15,000 wafers per month. This is the second time the bank has raised its CoWoS capacity forecast in three months.
JP Morgan pointed out that the capacity increase mainly comes from the rising demand in the ASIC supply chain. TSMC's expansion focuses on CoWoS-L technology, with some 65nm front-end capacity (Fab 14 and Fab 12) starting to be used for LSI/intermediate layer manufacturing, while CoWoS-S supply will remain basically stable, and CoWoS-R will be more outsourced to packaging and testing factories like ASE.
<img src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/29dff434-38f4-4c47-8aea-d2e27e6fdac7.png?x-oss-process=image/auto-orient,1/interlace,1/resize,w_1440,h_1440/quality,q_95/format,jpg" alt="" original-src="https://imageproxy.pbkrs.com/https://wpimg-wscn.awtmt.com/29dff434-38f4-4c47-8aea-d2e27e6fdac7.png"/>
<h2>Strong TPU Demand Drives Capacity Forecast Upward</h2>
Based on strong demand signals from the back-end and front-end supply chains, JP Morgan has once again raised its shipment forecast for Google's TPU. Analysts expect TPU shipments to reach 3.7 million units and 5 million units in 2026 and 2027, respectively, higher than previous forecasts.
To meet TPU demand, JP Morgan has raised Broadcom's CoWoS wafer allocation to 230,000 wafers in 2026 and 350,000 wafers in 2027. For MediaTek, it is expected to receive wafer allocations of 18,000 and 55,000 wafers in 2026 and 2027, respectively. The TPU v7 (Ironwood) and v8 series (Broadcom's AX version and MediaTek's X version) will account for the majority of shipments in 2026-2027.
Currently, all TPU capacity is handled by TSMC's CoWoS-S technology. Although certifications for Amkor and ASE are being advanced to meet rising demand, progress is slow as TSMC is unlikely to expand CoWoS-S capacity. JP Morgan expects that there will not be a large amount of TPU shipments from packaging and testing factories in 2026. The v9 series TPU based on 2nm process is expected to begin small-scale production in collaboration with Broadcom by the end of 2027, featuring 3D SoIC packaging and CoWoS-L technology, which has a high level of technical complexity.
<h2>NVIDIA Allocation Basically Flat, AMD and AWS Projects Progress Differently</h2>
JP Morgan maintains NVIDIA's CoWoS allocation at 700,000 wafers for 2026, but the product mix has been slightly adjusted. Due to issues with HBM4 readiness, the mass production timeline for the Rubin series has been delayed by 1-2 months, resulting in a slight downward adjustment in corresponding shipment volumes, while the shipment volume for GB300 has increased
Analysts expect that approximately 400,000 to 500,000 H200 chips will be packaged through Amkor in 2026.
For 2027, JP Morgan has raised Nvidia's CoWoS allocation by 4% to reflect stronger demand for Rubin and Rubin Ultra. Taiwan Semiconductor will handle all CoW processes for Nvidia GPUs, while the substrate portion will be outsourced to Amkor. The Vera CPU project will start with Taiwan Semiconductor's CoWoS-R but is expected to transition to Amkor or Amkor by the end of 2026 or early 2027.
AMD's CoWoS forecast remains largely unchanged, with 90,000 wafers and 120,000 wafers expected in 2026 and 2027, respectively, but shipments in 2026 are highly concentrated in the fourth quarter (55,000 to 60,000 wafers), mainly due to the MI450 starting mass production in August-September. Given the multiple challenges facing the project, including Serdes, SoIC yield, ultra-large package sizes, and rack-level integration, there is a risk of delays until 2027.
AWS's Trainium project has been slightly downgraded due to timing issues, with expected shipments of 2.1 million units in 2026 (of which Trn3 is 1.5 million units and Trn2 is 600,000 units), but the total lifecycle volume remains unchanged. JP Morgan's supply chain survey shows that currently only CoWoS wafers dominated by Alchip and Annapurna are being seen, while Marvell-led projects have not yet entered mass production.
<h2>Outsourcing Ratio of Packaging and Testing Plants Increases, Equipment Vendors Will Benefit</h2>
Due to the severe limitations on Taiwan Semiconductor's CoWoS capacity, even with rapid growth, Taiwan Semiconductor will focus on supporting key GPU and AI ASIC projects while leaving smaller or secondary projects to packaging and testing plants. JP Morgan expects Amkor to benefit from AMD's Venice CPU, Nvidia's Vera CPU, and some Trainium3 and TPU projects by the end of 2026 and 2027, while continuing to serve as a core outsourcing partner for Taiwan Semiconductor's substrate and wafer probing processes.
Amkor is expected to gain incremental business from Nvidia's H200, Broadcom's network chips, Vera CPU, and eventually some TPU orders. JP Morgan anticipates that packaging and testing plants will contribute approximately 12,000 to 15,000 effective CoW wafers per month by the end of 2026. Intel's EMIB-T technology is also under consideration for some projects, including MediaTek and Broadcom's small-batch TPU projects in 2027.
JP Morgan believes that strong demand for CoWoS, WMCM, and FOCoS provides clear visibility for Taiwan's advanced packaging equipment suppliers (including Grand Process Technology, Scientech, All Ring, etc.) through 2026. Equipment suppliers expect CoWoS demand to grow year-on-year, with an additional capacity of approximately 40,000 to 50,000 wafers per month, up from about 35,000 wafers per month in 2025. Analysts expect these equipment vendors' shipments in 2026 to potentially increase by 20% to 30% or more year-on-year

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JP Morgan has raised its CoWoS capacity forecasts for 2026 and 2027 by 8% and 13%, respectively. Among them, TSMC's CoWoS capacity is expected to reach 115,000 wafers per month by the end of 2026, and the continuous expansion of capacity will provide solid support for TPU shipment growth

- JPMorgan has raised its expectations for Google's TPU chip shipments, forecasting 3.7 million units in 2026 and 5 million units in 2027, driven by TSMC's expanding CoWoS packaging capacity and strong market demand.  
- The report notes an 8% and 13% increase in CoWoS capacity predictions for 2026 and 2027, respectively, attributed to TSMC's new capacity construction.  
- As demand for TPUs remains robust, this adjustment reflects a significant increase in expected wafer allocations for Broadcom and MediaTek to meet evolving market needs.

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Taiwan Semiconductor

Direxion Semicon Bull 3X

With CoWoS capacity support, JP Morgan has again raised its TPU shipment expectations: shipments are expected to reach 3.7 million and 5 million units in the next two years