SambaNova Abandons Intel Acquisition, Raises Funding Instead

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SambaNova has joined forces with Intel, but contrary to earlier reports that the AI chip startup was to be acquired by Team Blue for around $1.6 billion, the two companies have instead decided on a multi-year partnership, with Intel also making a strategic investment as part of SambaNova’s $350-million E-round.

SambaNova also announced a new chip, the SN50, designed for economic agentic inference at scale. This chip features new interconnect technologies that allow more chips to be connected in a single memory space, with increased computing power and the same memory capacity and hierarchy as SambaNova’s previous inference-focused chip, the SN40L.

Funding round

Neither Intel nor SambaNova would confirm reports Intel was set to acquire the startup at the end of 2025. However, a funding round is absolutely the right decision for the company, SambaNova CEO Rodrigo Liang told EE Times.

“As we saw in the market at the end of last year, the world is still very excited about chips and very excited about the value we can bring,” Liang said. (Nvidia all-but acquired competitor Groq for a reported $20 billion in December.) “[SambaNova] ended up having a record year last year, which gave us a lot of confidence that the path we are on, selling infrastructure for service providers with the right economics, the right efficiency and the right performance, allowed us to build a lot of momentum behind this [business] model.”

SambaNova’s $350-million series E was “grossly, grossly oversubscribed,” Liang said.

“For a modest strategic round, we had so much interest,” he added. “We were also able to bring partners in who are bringing unique access to types of customers and applications that are important to us, and we’re excited about that.”

Like other companies, SambaNova had taken a “pit stop” to refocus its offering on inference rather than training, spending most of 2025 focusing on tokenomics (the economies of serving LLM inference at scale).

“What we saw in the back half of the year was tremendous market momentum, which allowed us to feel very confident that the fixes and changes we made were starting to really take hold,” Liang said. “So it really made sense for us to do another round of funding. We saw incredible interest from top-notch investors … That gave us a lot of confidence that this was the right path for us to take for the foreseeable future.”

The round was led by Vista Equity Partners and Cambium Capital with participation from Intel Capital and sovereign wealth funds from countries including Qatar and the Kingdom of Saudi Arabia. SambaNova also currently has sovereign partnerships in Germany, U.K., Australia, Japan, and France.

“Our sovereign business has taken off in the last four or five months,” Liang said. “We’re selling into regions where it’s a SambaNova cloud, but it’s operated by our partners or customers. That will continue to be our primary business model, selling infrastructure into cloud and sovereign cloud [rather than becoming a major cloud provider in our own right].”

Part of SambaNova’s multi-year partnership with Intel is an expansion of SambaNova Cloud, the company’s developer cloud offering, based on Intel Xeon infrastructure. SambaNova said previously that production workloads can and do run on SambaNova Cloud, but Liang confirmed that the startup has no intention of becoming a major AI cloud provider in the same vein as Groq and Cerebras. Developers working on agentic AI will be able to access SambaNova hardware in various regions, giving them access to those markets via SambaNova’s partners and customers, Liang said.

Intel partnership

A second part of the agreement with Intel is an as-yet undefined joint go-to-market strategy, which is likely to include joint selling and marketing through Intel’s enterprise, cloud, and partner channels. “We’ll work through the right operating model and joint plans in the coming months,” an Intel spokesperson told EE Times.

“Intel’s scale and access plus what we bring to the table with our unique technology and competitive performance in the market, I think there’s a great synergy in being able to leverage those two things to become a very serious player at scale in the marketplace,” Liang said.

Thirdly, Intel and SambaNova are also working on a technology collaboration. An immediate combination of Intel Xeon CPUs plus SambaNova RDUs would seem like an obvious first step, but beyond that, Liang alluded only to “other things on the roadmap,” while declining to give further details.

“We need to figure out how to create seamless solutions that allow customers to take what they already have running on a CPU or GPU and run on this integrated platform seamlessly and very efficiently,” Liang said. “Those are the kind of things we want to do to unlock inference and the agentic market at scale.”

Per current industry trends for disaggregated inference, LLMs can be split into prefill and decode parts of the workload, with different characteristics. Some industry rumors suggest Groq’s accelerator could be used during the decode stage to complement Nvidia-accelerated prefill; it’s not hard to imagine a combination of a future Intel GPU plus SambaNova RDU operating as a disaggregated inference solution, but there’s been no suggestion from either company that this is what they’re working towards.

Intel’s statement to EE Times said the planned collaboration is intended to “give customers a powerful alternative to GPU-centric solutions.”

Intel’s blog on the announcement didn’t explicitly mention its Gaudi AI accelerator product line, which directly competes with SambaNova’s inference offering today. Intel’s reportedly planning to merge Gaudi IP into its data center GPUs going forward (the first part in this series is codenamed Jaguar Shores). It’s even less clear what the Intel-SambaNova partnership will look like beyond a future Jaguar Shores launch.

“The combination of Intel CPUs and SambaNova’s AI platform can provide a compelling rack-level inference option as Intel’s GPU-based solutions come online,” Intel’s blog said. “This collaboration complements Intel’s existing data center GPU commitments and does not alter its path forward to competing in AI.”

“[Intel] continues to invest across GPU IP, architecture, products, software, systems, and strengthen its roadmap as part of its edge-to-cloud AI engagements,” according to the blog.

New Intel CEO Lip-Bu Tan faced criticism when it looked like Intel would acquire SambaNova, since his venture capital firm had invested in SambaNova and he’s also the chair of SambaNova’s board. In a statement to EE Times, Intel clarified that Tan recused himself from this process with Intel’s new data center chief Kevork Kechichian acting as executive sponsor for the deal. Intel’s board “believes it’s important that Intel fully leverage [Tan’s] vast network,” the statement said.

New chip

SambaNova also announced its fifth chip, the SN50, billed as 5× faster than competitive chips and 3× cheaper than GPUs for agentic AI. Japan’s SoftBank will be the first customer to deploy the SN50.

The SN50 is designed for LLM token generation in multi-agent workflows. Agentic applications with lots of custom agents have very, very low latency requirements, which become cost prohibitive for businesses to run, Liang said.

“SN50 can hit this golden zone where we’re providing latency and throughput but the service provider’s tokenomics is in the right place,” Liang said. “We’ve seen this in the last couple of years, where you are either really, really fast, but the service provider cannot monetize it profitably, or you can batch it like crazy for good economics but there’s a delay to the end user. SambaNova’s customers can turn this into a proper profitable inference service.”

The new focus on agentic inference meant several significant changes versus the SN40L, Sumti Jairath, chief architect at SambaNova, told EE Times.

The SN50 has the same dataflow architecture as the SN40L, SambaNova’s previous LLM inference accelerator, with the same three-tier memory hierarchy. Compute per chip has been increased, support for lower precision math added, and there’s a new proprietary interconnect protocol that further enables scale-out. All of these changes drive interactivity and economics for fast tokens in agentic systems.

Agentic systems need to call multiple models but these models are usually spread across different chips and different systems. Today, this means standing up multiple racks with agents on individual machines, which is very inefficient since most of the hardware is effectively idling while specific agents are called. This is the limiter for today’s agentic systems, Jairath said.

“The way we see the future is that everybody wants all the models and parameters sitting on the same machine so they can call whatever model they want to interact with,” he added.

SambaNova’s three-tier memory hierarchy supports what it calls “agentic caching,” running multiple models while serving many requests with prompt caching.

The SN50 has the same memory as the SN40L: 1.5 TB DDR5 DRAM, 520 MB SRAM (across both compute chiplets), and 64 GB HBM3.

“The way we use HBM is different from how Nvidia uses HBM,” Liang said. “Because we have a big DRAM sitting right next to it, we don’t use [HBM] purely as capacity, we use it as a hot cache. We’re doing N minus one generation of HBM because of cost and supply availability. We don’t want to be fighting for HBM with the latest GPUs. We are able to achieve the performance with N minus one, so we can achieve the economics we want to achieve.”

GPUs have notoriously poor memory bandwidth utilization for HBM, which Jairath puts down to “launching new kernels and synchronizing things.” Good utilization for SambaNova is close to 90%, he added.

The SN50 will have 2.5× more compute at 16-bit compared to the SN40L, and will add support for 8- and 4-bit.

“We increased the compute for the SN50, but we still had headroom on the memory side, both in terms of capacity and bandwidth, so it works out perfectly fine with the higher amount of compute,” Jairath said.

A new interconnect protocol will enable scale-out beyond the 16 sockets the SN40L allowed. Per the new protocol, 256 sockets can share the same memory space, Jairath said. (Nvidia Blackwell GPUs can be in domains of up to 72.)

“It’s pretty much the standard Ethernet SerDes, but with our proprietary protocol, we get both direct connectivity among RDUs in the same rack, and we use similar links for rack-to-rack connectivity,” Jairath said. “This allows us to scale up and scale out resources, depending on what configurations we want to build.”

Evolving workloads mean flexibility in system design is valuable, Jairath said. Ethernet’s ubiquity gives the company more choice in network and switching hardware versus a fully custom solution, and it allows customers to integrate SambaNova racks easily. Layer 2 switching uses standard Ethernet components, Jairath said.

The new interconnect scheme provides low latency access to SRAM across up to 256 chips. While DeepSeek famously had to work at the instruction set level to overlap compute and data transfer for Nvidia GPUs, with dataflow architectures, this overlap is an inherent feature, Jairath said.

“Low latency access to SRAM across chips makes it possible to cache big models, so there is no upper limit to token speed,” he said. “Techniques like tensor parallel, pipeline parallel, expert parallel—the basis of these techniques is having low latency access to that memory. You can build any form of parallelization easier than you could with other architectures.”

SN50, and rack-scale systems featuring the SN50, will ship in the second half of 2026.