
The hottest chip research institution! SemiAnalysis founder: The computing power bottleneck has shifted from CoWoS to EUV, with storage consuming 30% of capital expenditure

The founder of SemiAnalysis stated that the bottleneck of AI computing power expansion is like "whack-a-mole" and is constantly changing. Currently, the bottleneck may return to chip manufacturing. The demand for high-bandwidth memory (HBM) triggered by inference models has a wafer consumption four times that of ordinary DRAM, which will lead to a halving of smartphone shipments. By 2026, 30% of the capital expenditure of tech giants will be consumed by storage. Power is not the ultimate constraint, as solutions such as aircraft modifications and fuel cells can be addressed through "post-meter" options. The ultimate ceiling may be after 2028, due to ASML's annual production of fewer than 100 EUV lithography machines
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