<div id="readability-page-1" class="page">Huawei Technologies has unveiled a new scaling law and chip architecture that can bring its chips equivalent to a process node of 1.4 nanometre by 2031, in a key step by the Chinese tech giant to establish a self-reliant semiconductor ecosystem. The company claims the new Tau (τ) Scaling Law, which was presented by He Tingbo, chair of Huawei Scientist Committee and president of the company’s semiconductor business department on Monday, is a new principle that guided “evolution of both semiconductors and electronic systems”. During He’s keynote speech delivered at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai on Monday, she said Huawei had been using the new scaling law to design and mass produce 381 chips over the past six years. Also dubbed “Her’s Law” by He’s peers, the new principle proposes a paradigm shift that replaced the traditional geometric miniaturisation of transistors with time (τ) scaling. Based on the law, He also unveiled an innovative core technology called LogicFolding architecture, which can reduce the resistive and capacitive load of signal propagation, ultimately boosting transistor density. The company expects its self-developed high-end chips, based on the new scaling law, to feature a transistor density equivalent to 1.4 nm processes by 2031. Its new Kirin chips, which are scheduled to launch later this year, will be the first to adopt the LogicFolding architecture with enhanced chip performance, He added. “Before winter 2026, we will bring the surprise … [a] big leap ahead,” He said in her speech. “This is just the start,” He continued, adding that the company took six years to get domestic technologies – including the electronic design automation tools and design methodologies – ready. “I used to think it may take us 10 years, but six years we are here.”   He said Huawei would move from local critical path folding to full-scale and multiplayer-folding for full-stack optimisation from devices to systems within a decade. “From 2026 to 2035, as a wide range of R&amp;D explorations goes into products, the transistor density will rise, operating frequency will surge and we keep delivering cutting edge mobile chips to the market,” He said. “The performance of our new chip can fully compete with the local counterparts. For AI systems, we remain equally confident of delivering high quality, low latency large-scale solutions.” The announcement underscored Huawei’s broader efforts to establish a fully independent chip innovation system, as it sought to bypass crippling US export restrictions and navigate the complex technical realities of the post-Moore’s Law era. The global semiconductor industry has relied on Moore’s Law – the observation that the number of transistors on a microchip doubled roughly every two years – to drive exponential gains in computing capability for decades, but as transistor sizes approach physical and atomic limits, this traditional scaling trajectory has drastically slowed. It also marked a rare chance by He, who has been leading the expansion of Huawei’s semiconductor unit over two decades while maintaining a low profile, to publicly deliver a keynote speech and declare the company’s chip innovation breakthroughs. In another sign of increasing exposure of Huawei’s chip business, the company’s little-known chip research lab – the Chip Fundamental Technology Research Laboratory – was featured for the first time on national television earlier this month, when Huawei founder and CEO Ren Zhengfei hosted Vice-Premier Ding Xuexiang at the firm’s Lianqiu Lake campus in Shanghai. Huawei has aggressively doubled down on its proprietary Ascend AI chips and Kunpeng processors over recent years, as the company looks to fill the domestic computing void left by foreign tech chip giants such as Nvidia. As part of the company’s ambition to replace Nvidia in China’s AI training and inference workload, the company is set to launch its Ascend 950 series, including the 950PR and 950DT, in 2026, and the Ascend 960 and Ascend 970 in 2027 and 2028, respectively, in a timetable that runs in parallel with AI chips from Nvidia and Advanced Micro Devices. </div>

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<p>Huawei Technologies has introduced a new scaling law and chip architecture aimed at achieving a 1.4 nm process node by 2031, marking a significant step towards a self-reliant semiconductor ecosystem. The Tau (τ) Scaling Law, presented by He Tingbo, enables the design of high-density chips, with the first Kirin chips adopting this architecture set to launch later this year. Huawei aims to compete with global chip leaders like Nvidia, launching its Ascend AI chips in the coming years to fill the domestic computing gap.</p>

Huawei unveils new scaling law and tech that narrows gap with TSMC, Samsung