Ming-Chi Kuo: Integrating into the NVIDIA ecosystem, LPU production will surge tenfold, significantly impacting the PCB supply chain

Nvidia incorporates Groq LPU technology into the Rubin platform, triggering a profound transformation at the supply chain level. At the Nvidia GTC conference, CEO Jensen Huang announced the launch of the Nvidia Groq 3 LPU chip, officially integrating it into the Vera Rubin platform system as a core inference acceleration component for the next generation of AI data centers. Renowned Apple supply chain analyst Ming-Chi Kuo immediately released a supply chain survey report, pointing out that after Nvidia's investment in Groq, the LPU shipment forecast has been significantly raised, with total shipments expected to reach 4 to 5 million units from 2026 to 2027, achieving a more than tenfold increase compared to historical annual production. Kuo believes that this explosive growth is driven by two core factors: first, the deep integration of LPU with Nvidia's CUDA ecosystem significantly lowers the development threshold; second, the rapid expansion of demand for ultra-low latency inference scenarios such as AI agents, real-time consumer endpoints, and physical AI. He also noted that the large-scale mass production of LPU/LPX racks will have a significant impact on the PCB supply chain, with WUS Printed Circuit expected to become a key beneficiary. Jensen Huang GTC Announcement: LPU officially becomes the seventh cornerstone of the Rubin platform In this year's GTC keynote speech, Jensen Huang revealed how Nvidia has integrated the IP technology acquired from last year's acquisition of Groq into the Rubin platform. The Nvidia Groq 3 LPU, as an inference acceleration chip, becomes the seventh core building block of the Rubin platform, following the Rubin GPU, Vera CPU, NVLink 6 expansion switch, ConnectX 9 smart network card, Bluefield 4 data processing unit, and Spectrum-X expansion switch. From a technical architecture perspective, the Groq 3 LPU has a distinctly differentiated approach compared to mainstream AI accelerators. Most AI accelerators rely on HBM as working memory, while each Groq 3 LPU is equipped with 500MB of SRAM—similar to the memory types used in CPU and GPU caches. Although this capacity is far lower than the 288GB HBM4 equipped with the Rubin GPU, its bandwidth reaches 150TB/s, far exceeding the latter's 22TB/s HBM bandwidth. For AI decoding operations that are highly sensitive to bandwidth, the ultra-high bandwidth of Groq 3 has significant advantages in inference application scenarios, especially suitable for cutting-edge AI model deployments that require large volumes, low latency, and high interactivity output. Supply Chain Survey: Shipments expected to reach 4 to 5 million units from 2026 to 2027 According to Kuo's latest supply chain survey, after Nvidia's investment in Groq, the LPU shipment forecast has seen substantial upward adjustments. He expects the total LPU shipments from 2026 to 2027 to be 4 to 5 million units, with 30% to 40% in 2026 and 60% to 70% in 2027. Compared to historical annual production, this scale represents an increase of more than an order of magnitude. At the rack level, NVIDIA plans to increase the LPU density per rack from 64 units to 256 units to maintain ultra-low latency during the inference decoding phase while addressing the expansion of KV cache demand brought about by long-context reasoning. Ming-Chi Kuo expects the new rack architecture to enter mass production from Q4 2026 to Q1 2027, with rack shipments expected to jump from 300 to 500 units in 2026 to 15,000 to 20,000 units in 2027. Ecosystem Integration is Key: Three Technical Nodes Determine Implementation Speed Ming-Chi Kuo pointed out that the rapid growth in LPU demand fundamentally stems from its deep integration with the NVIDIA ecosystem. The integration with NVIDIA CUDA significantly lowers the barriers to application development and deployment, allowing developers to leverage LPU computing power without having to restructure existing workflows. Meanwhile, the rapid expansion of ultra-low latency inference scenarios such as AI agents (e.g., programming agents), real-time consumer applications, and physical AI further drives the LPU demand curve. He also listed three key technical integration nodes to monitor: First, at the network architecture level, whether rack-level interconnect can achieve smooth integration through NVLink Fusion and RealScale; second, at the developer interface level, whether NVIDIA NIM can allow developers to deploy workloads directly without distinguishing between GPU and LPU; third, at the compiler level, whether TensorRT-LLM can support the "ahead-of-time compilation" architecture for LPU. Ming-Chi Kuo believes that the pace of advancement in these three integrations will directly determine the speed and depth of LPU scaling. PCB Supply Chain Enters a New Cycle: WUS Printed Circuit Boards May Become Core Beneficiaries Ming-Chi Kuo emphasized that the mass production of LPU/LPX racks has significant implications for the PCB supply chain. He pointed out that LPU/LPX racks represent the first large-scale commercial deployment of M9-level CCL (copper-clad laminate) materials, with WUS printed circuit boards playing a key role in this supply chain. M9-level CCL materials have extremely high manufacturing process requirements, involving technological breakthroughs in processing high-layer boards with quartz glass fabric. Ming-Chi Kuo believes that if LPU/LPX racks are successfully ramped up, it will not only make a substantial contribution to WUS's performance in 2027 but also validate the company's technological capabilities in the high-end manufacturing sector, potentially catalyzing a new growth cycle for the entire PCB industry