TSMC has nearly finalized specs for a new advanced semiconductor packaging aimed at more powerful AI chips, called ‘panel-level packaging’ that will use a substrate 310mm by 310mm, much smaller than the 515mm-by-515mm previously trialed by TSMC, Nikkei Asia reports, adding a pilot line is under construction in Taoyuan, Taiwan for small volume output in 2027. $Taiwan Semiconductor(TSM.US) $NVIDIA(NVDA.US) $Broadcom(AVGO.US) $Marvell Tech(MRVL.US) #semiconductors #semiconductor
Source: Dan Nystedt
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