AMD’s new “Venice” CPU is already in 2nm mass production by TSMC, media report, citing AMD CEO Lisa Su, and adding “Verano”, another 6th-gen EPYC CPU, will also be 2nm. Venice is the first high performance computing (HPC) chip made on TSMC’s most cutting-edge manufacturing process. AMD has also already qualified the first panel-based EFB interconnect with Powertech (PTI), Taiwan, as AMD turns to FOPLP (Fan-out Panel-level-Packaging) for more cost-effective higher volume packaging. AMD is also working with ASE and SPIL on 2.5D bridge interconnects. $AMD(AMD.US) $Taiwan Semiconductor(TSM.US) $Advanced Semiconductor Engineering(ASX.US) #Powertech #semiconductors

Source: Dan Nystedt