
SMIC (Trans): Street Too Bearish on Smartphones; Memory Shortage to Ease in Q3
Below is Dolphin Research's compiled transcript of SMIC's Q4 2025 earnings call. For our earnings take, see 'SMIC: Doubling Down Against the Cycle — the 'last mile' for China AI chips?'.

Key takeaways from SMIC's discussion:
1) 2026 outlook: Full-year revenue growth to outpace peer Avg. 2026 CAPEX expected to be roughly flat vs. 2025 ($8.1bn). Depreciation to rise meaningfully in 2026, by Approx. 30%.
2) Current industry setup: The market is highly bifurcated. Mid/low-end smartphones and PCs are weakening, and the company has proactively trimmed capacity. By contrast, memory and related logic remain tight, with industry-wide price hikes.
3) Read on handset recovery: Once significant front-end capacity is released over the next nine months and channels see prices peaking, distributors will start offloading inventory, driving a turn in consumer and mid/low-end smartphones. At an aggregate level, annual output of PCs and phones should stay broadly stable. The company is advising logic customers not to over-cut on short-term pessimism, and some who planned deep cuts have started to reinstate orders.
4) Memory tightness: A notable inflection could arrive in Q3 this year. Newly released front-end wafer capacity that cannot pass AI-grade qualification will quickly pivot to fill memory gaps in consumer electronics (phones, PCs, watches).
Memory capacity previously crowded out by AI in phones and PCs should prove temporary. As new tools arrive over the next 4–16 months, capacity will first flow back to consumer end-markets. At that point, distributors, anticipating more supply and a price peak, may dump inventory, creating a double-release effect that accelerates the easing of consumer memory shortages.
5) Industry structure: Some overseas peers are dealing with aging tools at legacy fabs, freeing space for advanced packaging, or even selling assets, further tightening mature-node supply globally. After a clear capacity reallocation, mature-node pricing should stabilize and edge up this year.
Overall, heavy CAPEX and D&A, plus low yields on advanced nodes (7nm-class), are pressuring results this quarter and will likely cap GPM improvement for all of 2026. Management views the weak outlook in smartphones/PCs as overly bearish.
Near-term earnings pressure may weigh on the stock. Longer term, the market can live with lower margins given SMIC’s role as China's leading foundry, bearing the strategic mandate to advance domestic AI chips and investing 'regardless of cost' to scale R&D and capacity. As long as SMIC ships AI chips at scale, it can command a premium PB vs. peers (e.g., UMC, GlobalFoundries).
I.$SMIC(00981.HK) Earnings recap
1. Guidance
a. Q1 outlook: Revenue roughly flat QoQ; GPM at 18%–20%. b. Full-year revenue: Growth to exceed peer Avg. c. CAPEX: 2026 CAPEX to be roughly flat vs. 2025 ($8.1bn). d. Capacity adds: By end-2026 vs. end-2025, 12-inch equivalent monthly capacity to rise by ~40k wafers.
II.$SMIC(688981.SH) Earnings call details
2.1 Management remarks
1) Utilization and output
a. Running near full: In Q4, even after adding 16k 12-inch WPM, overall utilization stayed high at 95.7%. 8-inch was over-booked and 12-inch near full, showing a seasonally resilient quarter. b. Ramp pace: About 50k 12-inch WPM was added in 2025; uneven delivery of critical vs. supporting tools led to timing mismatches, delaying full-ramp readiness.
2) Segment and application performance
a. Localization tailwinds: Growth was driven by the shift to 'local manufacturing'. Analog converted fastest, followed by display drivers, cameras, and memory. b. Industrial & auto: Wafer revenue rose over 60% YoY in absolute terms, benefiting from platform build-out and faster onshoring. c. Consumer electronics: Revenue grew over 30% YoY, helped by domestic stimulus and export recovery. d. Geographic mix: China stayed at 85% of revenue, up 18% YoY in absolute terms, outpacing overseas (+9%).
3) AI-driven cycle effects
a. Structural split: Strong AI demand for high-end memory has crowded out capacity, pushing up prices and squeezing supply for mid/low-end smartphone memory, thereby weighing on lower-end foundry orders. b. Playbook: Strength in BCD analog, mid/high-end DDIs, etc., helped offset low-end volatility, and 2026 revenue is still expected to outgrow peers.
2.2 Q&A
Q: Memory upcycle dents mid/low-end phone demand but spurs new demand. What AI-driven demand is emerging, which platforms benefit, and when does mid/low-end phone demand bottom?
A: The memory cycle impact is fully reflected in our revenue outlook and reported numbers. On mix, PCs and peripherals fell 4ppt in Q4. For the H1 downturn in mid/low-end phones and PCs, we proactively shifted capacity toward data centers, auto, and industrial segments where demand is tight. Current utilization and guidance already capture this view.
The market is sharply bifurcated. Memory and related logic we touch are growing fast with urgent demand; pricing kept rising through Q1. We are pivoting capacity into specialty memory MCUs and memory-adjacent logic. Beyond compute, data transmission ICs (optical and electrical) are growing, and edge/endpoint devices are seeing multi-fold increases in power management demand. Our BCD capacity has remained short on auto, data center, and industrial needs, and in coming months we will ramp new tools to prioritize BCD, base stations, and AI-related circuits.
On timing for a handset rebound, end-demand has not vanished; it is deferred. When supply is tight, demand is 'amplified', triggering panic orders and price spikes. The current bottleneck sits in HBM packaging and test (e.g., FT, back-grinding), not in front-end wafer capacity. While front-end capacity should rise as new tools land over the next 4–9 months, AI products face long qualification, so new capacity will first flow to faster-qualifying consumer, handset, and toy markets.
The inflection trigger is: as front-end capacity releases over nine months and channels see a price peak, they will offload inventory, turning consumer and mid/low-end phones. In aggregate, annual PC and phone output should stay broadly stable. We are advising logic customers not to over-cut on short-term pessimism to avoid share loss on a Q3 rebound. Some who planned steep cuts are already bringing orders back.
Q: You delivered both volume and ASP gains, and raised prices on some lines in Dec last year. What drove the move, and does pricing power imply tight supply at mature nodes into 2026 amid global exits from mature capacity?
A: Pricing is about supply/demand, and we generally follow major suppliers' moves. When memory prices rise, our memory products adjust accordingly. BCD remains tight across AI, data center, and auto, so pricing stays elevated there.
On supply, we do see declines. Some peers are exiting mature capacity, reallocating to advanced packaging, or selling assets, tightening supply and improving structure. Former price-floor categories like CIS and LCD drivers have stabilized and begun to tick up, while memory is rising fast and some niches remain undersupplied.
Standard products without iteration see unit prices fall over time. But customers with faster product cycles can still lift pricing, even in Wi-Fi, LCD driver, or AMOLED driver. Conversely, suppliers sticking to legacy CIS, etc., face price pressure.
Hence our strategy: prioritize R&D, engineering, and capacity toward fast-iterating products with better price durability. Active mix optimization gives us tighter control over overall ASP trends.
Q: How do you view the impact of exits by overseas mature-node players (e.g., Taiwan/Korea) on structure? How much does memory growth pull logic demand, and where do mature-node supply/demand and pricing trend from here?
A: The market is undergoing major change. AI, data centers, edge endpoints, and domestic auto are unleashing substantial incremental demand. These new apps are rapidly absorbing BCD and memory capacity, crowding out mature-node supply and platforms once used by CIS, LCD drivers, and standard logic.
On supply, exits are accelerating. Aging tools at legacy overseas fabs and the need to free space for advanced packaging, plus asset sales, are shrinking mature-node capacity. With new demand taking share and legacy supply falling, erstwhile abundant mass-market products (CIS, LCD drivers, standard logic) have turned tight.
On pricing, these standard products historically fell annually, but with tighter supply, new contracts are at least flat to up. This supports stabilization to mild increases this year. We are also reallocating tools, converting mass-market capacity to BCD and memory where pricing and demand are stronger. Net-net, mature nodes will see a clear capacity shift this year, with pricing stabilizing to slightly up.
Q: How material is localization to your product mix? With a 40k WPM add in 2026, how do you balance higher D&A vs. margins? How will quarterly ramp and D&A pressure evolve, and when does the P&L turn more virtuous?
A: CAPEX will stay similar to last year, around $8.0bn this year. Conversion from CAPEX to output is non-linear given uneven delivery cycles. On mature lines, ~RMB 80–83 per 100 of spend goes to tools (40nm/55nm/28nm), and timing shifts actually allow better assembly and ramp planning, helping us schedule D&A starts.
Given heavy CAPEX in 2024 ($7.3bn) and 2025 ($8.1bn), tools are arriving and ramping, so 2026 D&A will rise by Approx. 30%, creating major cost pressure. We aim to sustain share and support strategic customers while absorbing the D&A step-up.
The P&L flywheel improves when new D&A roughly matches roll-off, with revenue scaling up. Our view: we can navigate 2026 steadily, while 2027 may be peak D&A pressure. Beyond 2027, financials should trend better.
Q: Q4 showed noticeable mix shifts across end-markets. Given PC shipment expectations, how will downstream mix evolve?
A: We pre-rotated capacity based on market and customer signals. Downstream customers face memory shortages, and distributor hoarding is stalling supply release, so clients expect PCs and edge products could be constrained. We cut PC allocation early and redirected to BCD, memory-adjacent, and new designs.
Logically, tight memory does not reduce high-end demand; customers prioritize limited memory to higher-value devices like mid/high-end phones, premium PCs, and smartwatches. As a result, our mid/high-end orders and capacity have increased. Categories growing include AMOLED drivers, mid/high-end CIS, high-voltage logic BCD, MCUs, and memory. For legacy mass products without iteration, we trim allocation and manage price pressure.
The immediate task is to encourage customers to rebuild inventories. We believe end-demand is intact, and clients need stock for a turn. If memory supply normalizes but companion chips (CIS, LCD driver, Wi-Fi, etc.) lag, customers risk share loss. Recently, sentiment has shifted: clients who were overly bearish and planned deep cuts are gradually restoring orders, marking a turn from pessimism to defensive restocking.
Q: With CNY seasonality, rising capacity, and some order catch-up, what is Q1 utilization outlook?
A: First, on capacity structure: SMIC runs many fabs and must support engineering, qualification, and R&D beyond volume production. At full throttle, practical utilization is ~95%–96%. Our Q1 goal is to keep utilization roughly flat vs. Q4.
We coordinated extensively to close prior gaps. The gap came from clients fearing memory shortfalls would trap inventory and that legacy SKUs might face markdowns or write-offs during transitions. We are working with customers to build inventory for refreshed products and, for mid/low-end, to agree fair pricing and share risk so orders return.
Note Q1 capacity is larger than Q4, so matching utilization requires even more orders than in Q4. That remains our focus. With more than half the quarter left as of Feb 11, we still aim to match Q4 utilization in Q1.
Q: 2025 CAPEX slightly exceeded the initial plan due to 'early procurement'. What drove this, and does it imply a higher share for supporting tools in 2026 CAPEX?
A: Our expansion follows long-term planning. Historically we 'defended tight', aligning annual capacity, D&A, and headcount via LTAs. But uncertainty has surged: demand shifts faster, and without buffer capacity we could lose core customers; plus, peers are accelerating builds, so we need reserves to back strategic wins.
Also, geopolitics has made delivery cycles unpredictable with approvals beyond our control, so ordering early is essential. With the current memory build-out wave, equipment lead-times are stretching amid tight vendor slots. We anticipated this and placed orders early; CAPEX beat was mainly due to quicker-than-expected deliveries, so we pulled in tools.
For 2026, total spend should be roughly flat YoY (~$8.0bn). Having pulled in many core tools last year, this year is about completing supporting kits. Our rule is that inbound tools must translate quickly into output, so we will plug capacity gaps to ensure rapid ramp post-install, keeping CAPEX elevated.
Q: Based on your '5% gap, 2x price elasticity' heuristic, how is this memory cycle similar/different? Will real shortages keep squeezing global foundry capacity?
A: There are two distinct logics in memory. In AI and data centers, demand is being 'built ahead'—ambitions push to build a decade of infra in two years, and the compute gap will persist for years and cannot be closed quickly by reinvestment. Meanwhile, front-end wafer and tool adds are fast, but new front-end output cannot join AI/DC supply chains quickly due to long qualifications.
This timing gap drives a key flow: new front-end output that misses AI-grade bars will quickly pivot to fill consumer memory gaps in phones, PCs, and watches. The AI crowd-out in phones/PC memory is temporary; as new tools arrive over the next 4–16 months, capacity first returns to consumer. Then distributors, seeing supply rising and prices peaking, will dump inventory, accelerating the easing of consumer memory shortages.
My view: Q3 this year could mark a clear inflection. We keep urging SMIC customers to avoid line stops and stock up for a Q3 turn. End-demand is unchanged; when memory catches up, share goes to the prepared.
Note the real constraint for HBM is not the front-end fab but the back-end, including chamfering, back-grinding, 3D stacking, and FT test, where expansion and yield ramps are slow and qualification is lengthy. Even if all front-end goes to AI wafers, back-end packaging and test remain the bottleneck. Early HBM leaders will keep the gains, while new fabs/entrants will struggle to tap AI profits near term and will shift to mid/low-end and consumer markets instead.
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