๐ข ๐๐จ๐ฆ๐ง ๐๐ก: $Astera Labs(ALAB.US) Astera Labs Launches New Leo Memory Solutions for Agentic AI Infrastructure
๐ ๐๐ฒ๐ ๐๐ถ๐ด๐ต๐น๐ถ๐ด๐ต๐๐:โค ๐๐๐๐ฒ๐ฟ๐ฎ ๐๐ฎ๐ฏ๐ launches new ๐๐ฒ๐ผ ๐ซ-๐ฆ๐ฒ๐ฟ๐ถ๐ฒ๐ and ๐๐ฒ๐ผ ๐ฎ memory controllers.โค Leo X-Series targets ๐๐ฉ-๐ฐ๐ฎ๐ฐ๐ต๐ฒ-intensive, long-context agentic AI inference workloads.โค Leo X-Series delivers up to ๐ฒ๐ฎ% faster time-to-first-token.โค Platform delivers up to ๐ฎ๐ฎ% more tokens per second.โค Leo 2 doubles ๐บ๐ฒ๐บ๐ผ๐ฟ๐ ๐ฏ๐ฎ๐ป๐ฑ๐๐ถ๐ฑ๐๐ต and capacity versus previous generation.โค New controllers support ๐๐๐ฅ๐ฐ, ๐๐๐ฅ๐ฑ, ๐ฃ๐๐๐ฒ ๐ฒ and ๐๐ซ๐ ๐ฏ.๐ฎ.โค Leo 2 enables memory expansion, pooling, sharing, and ๐๐๐ฅ๐ฐ reuse.โค Astera reports growing design wins across ๐๐ ๐น๐ฎ๐ฏ๐, hyperscalers, and neoclouds.โค New Leo products are ๐๐ฎ๐บ๐ฝ๐น๐ถ๐ป๐ด ๐๐ผ๐ฑ๐ฎ๐ with hyperscaler customers.โค Development involved ๐๐ ๐, ๐๐ฟ๐บ, ๐๐ป๐๐ฒ๐น and major memory suppliers.๐ ๐ช๐ต๐ ๐ง๐ต๐ถ๐ ๐ ๐ฎ๐๐๐ฒ๐ฟ๐:โค Agentic AI is rapidly increasing demand for ๐บ๐ฒ๐บ๐ผ๐ฟ๐ ๐ฐ๐ฎ๐ฝ๐ฎ๐ฐ๐ถ๐๐ and bandwidth.โค Faster KV-cache access can improve ๐๐ ๐ถ๐ป๐ณ๐ฒ๐ฟ๐ฒ๐ป๐ฐ๐ฒ economics and responsiveness.โค Memory pooling and reuse could reduce expensive ๐๐ฅ๐๐ over-provisioning.โค Growing design wins could expand Astera's exposure to ๐ฟ๐ฎ๐ฐ๐ธ-๐๐ฐ๐ฎ๐น๐ฒ ๐๐ infrastructure.๐ ๐๐ ๐ฝ๐ฒ๐ฟ๐ ๐ฆ๐๐ฎ๐๐ฒ๐บ๐ฒ๐ป๐๐:๐ ๐ฎ๐๐ ๐๐ถ๐บ๐ฏ๐ฎ๐น๐น, Vice President and Principal Analyst at Moor Insights & Strategy:โAgentic AI adoption is outpacing the industry's ability to provision memory for it, and that gap is widening every quarter," said Matt Kimball, vice president and principal analyst at Moor Insights & Strategy. "That growth is landing at the worst possible time for memory supply, with DDR5 tight and pricing climbing, so every gigabyte already deployed has to work harder. The new Leo X-Series and Leo 2 E and P-Series Smart Memory Controllers immediately address KV-cache-intensive AI workloads, improve memory utilization, and reliably reuse previously deployed memory across both AI and general-purpose cloud infrastructure, instead of simply buying more of it."๐ง๐ต๐ฎ๐ฑ ๐ข๐บ๐๐ฟ๐ฎ, Senior Vice President, Compute Connectivity Group at Astera Labs:โAgentic AI is where the economics of AI infrastructure are being decided, and those economics depend on putting every usable gigabyte of memory to work,โ said Thad Omura, senior vice president, Compute Connectivity Group at Astera Labs. โThe enhanced Leo family gives infrastructure providers purpose-built ways to connect memory to accelerators, CPUs, and hosts across the rackโturning previously deployed and stranded capacity into a resource that new AI and cloud workloads can use. We're seeing that translate into broader customer engagement across AI labs, hyperscalers, and neoclouds.โ๐ฅ๐ผ๐ฏ๐ฒ๐ฟ๐ ๐๐ผ๐ฟ๐บ๐๐๐ต, Corporate Vice President, Architecture and Strategy at AMD:โAgentic AI is increasing demand for balanced systems that can move and process more data without sacrificing efficiency. AMD EPYC processors deliver leadership performance, exceptional memory bandwidth and capacity, and high-speed I/O across the broadly deployed x86 platform. Our collaboration with Astera Labs around CXL extends that foundation, giving customers greater flexibility to scale memory-intensive AI and cloud workloads and improve infrastructure utilization.โ๐๐ฑ๐ฑ๐ถ๐ฒ ๐ฅ๐ฎ๐บ๐ถ๐ฟ๐ฒ๐, Vice President of Go-To-Market, Cloud AI, Arm:โAs AI infrastructure evolves, agentic AI, reinforcement learning and database workloads are driving demand for higher-capacity memory. Arm and Astera Labs are working together to pair Arm AGI CPU with Leo CXL Smart Memory Controllers, helping customers meet these growing requirements while maintaining scalable performance.โ๐ฆ๐ฟ๐ถ๐ป๐ถ ๐๐ฟ๐ถ๐๐ต๐ป๐ฎ, Fellow at Intel Data Center Group:"CXL was created to bring greater flexibility and efficiency to memory across the data center. Technologies like Astera Labs' Leo Smart Memory Controllers help turn that vision into reality, demonstrating how ecosystem innovation can help customers get more out of their AI infrastructure and support the next generation of data-intensive workloads."๐๐ฎ๐ป๐ด๐๐ฒ๐ผ๐ธ ๐๐ต๐ผ๐ถ, Vice President of Product Planning Team at Samsung Electronics:"We are contributing to the evolution of AI infrastructure through the development of CXL memory solutions designed to help address the growing memory demands of modern data centers. We are excited to collaborate with Astera Labs to help ensure our DRAM solution offer strong interoperability within the evolving CXL ecosystem, and remain committed to supporting a scalable, high-performance memory architecture for the AI era."




